Cortex-A710 erratum 2147715 is a Cat B erratum that applies
to revision r2p0 of the CPU, and is fixed in r2p1. The work-
around is to set CPUACTLR_EL1[22]=1. Setting this will cause
the CFP instruction to invalidate all branch predictor resources
regardless of the context.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN1775101/latest
Signed-off-by: Akram Ahmad <Akram.Ahmad@arm.com>
Change-Id: I94771bc1fc9b65a0c17d75200ec2b1df8a3279c6
Add an example manifest for the EL3 SPMC on the FVP Platform
that allows booting the TSP example partition.
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ie7f40328e0313abb5b1a121dfdc22a5f7387587f
Signed-off-by: Shruti Gupta <shruti.gupta@arm.com>
The current implementation expects that the endpoint IDs of all
participants of a memory transaction to be listed in the relinquish
descriptor. As per the FF-A spec, aside from the current partition
ID, only the IDs of stream endpoints whose behalf it is relinquishing
the memory region must be specified.
The current implementation does not currently support proxy endpoints
therefore ensure that the endpoint count is always equal to 1 and
no stream endpoint IDs are specified and instead just verify the
caller is a valid participant in the memory transaction.
Additionally reuse the updated check in the retrieve request flow
for additional verification.
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I3b970196af8a16b2531607775398cb8a2473793b
FEAT_RNG_TRAP introduces support for EL3 trapping of reads of the
RNDR and RNDRRS registers, which is enabled by setting the
SCR_EL3.TRNDR bit. This patch adds a new build flag
ENABLE_FEAT_RNG_TRAP that enables the feature.
This feature is supported only in AArch64 state from Armv8.5 onwards.
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>
Change-Id: Ia9f17aef3444d3822bf03809036a1f668c9f2d89
The new SoC version for STM32MP13 is the revision Y. The register
SYSCFG_IDC is updated for this new version with the value 0x1003.
The function stm32mp_get_soc_name() should also be updated to manage
this new SoC revision.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I4f2fa5f1503f17db93d8413c79c2b7a18d279f9b
Align with STM32MP15 file, use the macro STM32MP_DDR_S_SIZE, instead of
an hard-coded value.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ib31bed1ffe89ff221fab1884a2db729ce1e21846
Instead of adding all peripheral nodes in SoC DT files, and then
removing them with BL2 overlay file, just remove them from SoC files.
And remove peripherals that are not used in TF-A on STM32MP13.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I0c408d29b55cb94644c92539460fc62485781223
On STM32MP13, the max frequency for IOs is 130MHz, update the SDMMC
max-frequency property with this value. This is an alignment with
Linux DT file.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: If4b364f53f87d4b5d276a976af486a3bf083f49b
Update the pinctrl nodes for sdmmc instances in stm32mp13-pinctrl.dtsi
file to align with Linux. The boards DT files then need to be updated
accordingly.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I4e1f3cf78794bfb7bbe53cfc7e88623c7e79855d
Neoverse-N2 erratum 2376738 is a Cat B erratum that applies
to revision r0p0 of the CPU. It is fixed in r0p1. The workaround
is to set CPUACTLR2_EL1[0] to 1 to force PLDW/PFRM ST to
behave like PLD/PRFM LD and not cause invalidations to other
PE caches.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest
Signed-off-by: Akram Ahmad <Akram.Ahmad@arm.com>
Change-Id: I4ad4434f9b7210244e67046d9657d218857dced5
Instead of using hard-coded values in stm32_sdmmc2_read() function,
use a defined SDMMC_FIFO_SIZE, which is 64 on STM32MP1.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I1ace0a28fbddae474379f0187371b9c360ceb7b3
Although not recommended, the reset property could be made optional.
This way the driver will probe even if no reset property is provided
in an sdmmc node in DT. This reset is already optional in Linux.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I6e63ff00118d9497f505d6379982334dd62686ca
This flag allows switching to High-Speed mode on SD-cards.
The gain is ~44ms when using SP_min, and ~55ms with OP-TEE.
Change-Id: Ic396c6a14201580b5e5627e6174b85b437b87cae
Signed-off-by: Yann Gautier <yann.gautier@st.com>
For SD-cards, CMD6 is used to switch functions, like setting high speed
mode. As it has another meaning for eMMC, and may not work on standard
capacity SD-cards, it must be checked with MMC_IS_SD_HC flag.
As ACMD6 is also used, and will have the same index, a check on
CMD/ACMD commands is done: a boolean is stored depending on previous
command. It is set to true if CMD55 is issued, for other commands
it is set to false.
Change-Id: I6c2b9c7637656f858601ec075de1cb5f57af271a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
On SD-cards, Switch Function Command (CMD6) is used to switch
functions, like setting High Speed mode. It is useful for high capacity
cards to double frequency (from 25MHz by default to 50MHz).
If the SD-card is High Capacity, a CMD6 is issued after filling the
device information. If High Speed mode is supported and the switch is
OK, then the max_bus_freq can be set to 50MHz. The driver set_ios()
function should then be called to update peripheral configuration,
especially clock prescaler.
Change-Id: I2d6807aa7f9440d2b2f907a747cd3b47a2ba1545
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Fix syntax error when generating semantic versions on windows hosts.
Change-Id: Idba8827145b829a8ba07ff0540407dbfa1ca7984
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Increases the SRAM to a full 1MB and also increase BL31 size to have
room to spare for debugging.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Change-Id: I584f9d409a1f653a3dfc7cf2b95706ada367c70e
For A3K there are two different tools for booting Armada37x0 platform
over UART, one from Marvell and second from CZ.NIC. For A8K there is
just one my own mvebu64boot tool.
Add documentation how to build these tools and how to download TF-A
image over UART to boot TF-A without flashing it to non-volatile
storage.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ifa03584010a9c40496a34e6d5b9f3b78cb2cc89b
Some linker sections are discarded since 511046eaa2 ("BL31: discard
.dynsym .dynstr .hash sections to make ENABLE_PIE work"). However, that
logic was placed inside a preprocessor condition, so it only applied to
the !SEPARATE_NOBITS_REGION case. Move the /DISCARD/ block down so it
applies in all cases.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: I6604609f2321a2a9c32a25721a697c320108a974
Commit f7ec31db2d ("Disable PIE compilation option") allowed building a
non-relocatable firmware with a default-PIE toolchain by disabling PIE
at compilation time. This prevents the compiler from generating
relocations against a GOT.
However, when a default-PIE GCC is used as the linker, the final binary
will still be a PIE, containing an (unused) GOT and dynamic symbol
table. These structures do not affect execution, but they waste space in
the firmware binary. Disable PIE at link time to recover this space.
Change-Id: I2be7ac9c1a957f6db8d75efe6e601e9a5760a925
Signed-off-by: Samuel Holland <samuel@sholland.org>
The ETZPC is always secure, and the driver does no more rely on
secure-status (and status) DT property. Remove them from the SoC
DT file.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I5f1d3534679553d79e6866396cd70e21a595ef6a
The ETZPC peripheral is always secure, and has a fixed address,
given by STM32MP1_ETZPC_BASE. This is then not needed to check
that in DT.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ifb0779abaf830e1e5a469c72181c2b2726fb47b5
Clock name is not used and can be removed for code size optimization.
Change-Id: I75f6a1828e4374004e31a7ce13fa6885c52bbac3
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
The divn_max field is unused, remove it.
Change-Id: I971912bcc035f16963d98dfa88782c8aed4415f2
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
The purpose of including vendor extend plat.ld.rodata.inc
linker script is for compactly collecting vendor rodata in
intrinsic rodata section.
If vendors define a standalone section and assign the section
placed after __RW_END__, the raw bindry(bl31.bin) will include
bss section with zero value and increase binary size.
Signed-off-by: Leon Chen <leon.chen@mediatek.com>
Change-Id: I46dd8b02bfb26af1dcca27f61b3ea29ca74bbbd6
The URL of the Juno Getting Started Guide has been changed.
Fix the broken link.
Signed-off-by: Arthur She <arthur.she@linaro.org>
Change-Id: I55697f2f1f787c32d1ea7dfcf9eda619906cdb5d
Neoverse-V1 erratum 1618635 is a Cat B erratum that applies to
revision r0p0. It is fixed in r1p0.
The workaround is done through the instruction patching
mechanism, which is performed by a write sequence of
IMPLEMENTATION DEFINED registers.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN1401781/latest/
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>
Change-Id: I53e406735cd3a2a930fdc72ebce3bbed97100168
When the measured boot service was upstreamed to TF-M, its static
handle was reallocated into the user partitions range. This change
updates the static handle here to make the service accessible.
Also removes the SIDs and Versions, since they are unused when a
service is accessed through a stateless handle, which encodes both
service ID and version. The attestation and measured boot services
only support access through their handles.
Signed-off-by: Jamie Fox <jamie.fox@arm.com>
Change-Id: I9d2ff1aad19470728289d574be3d5d11bdabeef4
Currently Tf-A uses whatever openssl binary is on the system to sign
images. However if OPENSSL_DIR is specified in the build flags this can
lead to linking issues as the system binary can end up being linked
against shared libraries provided in OPENSSL_DIR/lib if both binaries
(the system's and the on in OPENSSL_DIR/bin) are the same version.
This patch ensures that the binary used is always the one given by
OPENSSL_DIR to avoid those link issues.
Signed-off-by: Salome Thirot <salome.thirot@arm.com>
Change-Id: Ib534e06ebc8482e4391e376d3791a87968de4a99
Next line should be aligned with the previous code.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: I20d82ba5fa70fa252341b62e57fac265241f3391
Use only one space between #define and macro name.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: Ieb9bdd5bcfa56bd265df72692a09c7340fe132cb
Akram Ahmad
Sandrine Bailleux
Marc Bonnici
Madhukar Pappireddy
Bipin Ravi
Juan Pablo Conde
Yann Gautier
Yann Gautier
Harrison Mutai
Jens Wiklander
Julius Werner
Pali Rohár
Joanna Farley
Samuel Holland
Gabriel Fernandez
Olivier Deprez
Leon Chen
Arthur She
Jamie Fox
Lauren Wehrmeister
Michal Simek
Salome Thirot