arm-trusted-firmware

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Commit Graph

Author	SHA1	Message	Date
Alexei Fedorov	003faaa59f	FVP: Add support for passing platform's topology to DTS This patch adds support for passing FVP platform's topology configuration to DTS files for compilation, which allows to build DTBs with correct number of clusters and CPUs. This removes non-existing clusters/CPUs from the compiled device tree blob and fixes reported Linux errors when trying to power on absent CPUs/PEs. If DTS file is passed using FVP_HW_CONFIG_DTS build option from the platform's makefile, FVP_CLUSTER_COUNT, FVP_MAX_CPUS_PER_CLUSTER and FVP_MAX_PE_PER_CPU parameters are used, otherwise CI script will use the default values from the corresponding DTS file. Change-Id: Idcb45dc6ad5e3eaea18573aff1a01c9344404ab3 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>	5 years ago
Madhukar Pappireddy	4682461ded	fconf: Extract topology node properties from HW_CONFIG dtb Create, register( and implicitly invoke) fconf_populate_topology() function which extracts the topology related properties from dtb into the newly created fconf based configuration structure 'soc_topology'. Appropriate libfdt APIs are added to jmptbl.i file for use with USE_ROMLIB build feature. A new property which describes the power domain levels is added to the HW_CONFIG device tree source files. This patch also fixes a minor bug in the common device tree file fvp-base-gicv3-psci-dynamiq-common.dtsi As this file includes fvp-base-gicv3-psci-common.dtsi, it is necessary to delete all previous cluster node definitons because DynamIQ based models have upto 8 CPUs in each cluster. If not deleted, the final dts would have an inaccurate description of SoC topology, i.e., cluster0 with 8 or more core nodes and cluster1 with 4 core nodes. Change-Id: I9eb406da3ba4732008a66c01afec7c9fa8ef59bf Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>	5 years ago
Madhukar Pappireddy	0ad5b318f7	Fix topology description of cpus for DynamIQ based FVP DynamIQ based designs have upto 8 CPUs in each cluster. This patch fixes the device tree node which describes the topology of the CPU for DynamIQ FVP Model. Change-Id: I7146bc79029ce38314026d4853e5b6406863725c Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>	5 years ago

Author

SHA1

Message

Date

Alexei Fedorov

003faaa59f

FVP: Add support for passing platform's topology to DTS

This patch adds support for passing FVP platform's topology
configuration to DTS files for compilation, which allows to
build DTBs with correct number of clusters and CPUs.
This removes non-existing clusters/CPUs from the compiled
device tree blob and fixes reported Linux errors when trying
to power on absent CPUs/PEs.
If DTS file is passed using FVP_HW_CONFIG_DTS build option from
the platform's makefile, FVP_CLUSTER_COUNT, FVP_MAX_CPUS_PER_CLUSTER
and FVP_MAX_PE_PER_CPU parameters are used, otherwise CI script will
use the default values from the corresponding DTS file.

Change-Id: Idcb45dc6ad5e3eaea18573aff1a01c9344404ab3
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

5 years ago

Madhukar Pappireddy

4682461ded

fconf: Extract topology node properties from HW_CONFIG dtb

Create, register( and implicitly invoke) fconf_populate_topology()
function which extracts the topology related properties from dtb into
the newly created fconf based configuration structure 'soc_topology'.
Appropriate libfdt APIs are added to jmptbl.i file for use with USE_ROMLIB
build feature.

A new property which describes the power domain levels is added to the
HW_CONFIG device tree source files.

This patch also fixes a minor bug in the common device tree file
fvp-base-gicv3-psci-dynamiq-common.dtsi
As this file includes fvp-base-gicv3-psci-common.dtsi, it is necessary
to delete all previous cluster node definitons because DynamIQ based
models have upto 8 CPUs in each cluster. If not deleted, the final dts
would have an inaccurate description of SoC topology, i.e., cluster0
with 8 or more core nodes and cluster1 with 4 core nodes.

Change-Id: I9eb406da3ba4732008a66c01afec7c9fa8ef59bf
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

5 years ago

Madhukar Pappireddy

0ad5b318f7

Fix topology description of cpus for DynamIQ based FVP

DynamIQ based designs have upto 8 CPUs in each cluster. This
patch fixes the device tree node which describes the topology
of the CPU for DynamIQ FVP Model.

Change-Id: I7146bc79029ce38314026d4853e5b6406863725c
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

5 years ago

3 Commits (894c635b8316f579dc3cceab310ed878092f6bb1)