The RSE_CRYPTO_EXPORT_PUBLIC_KEY_SID macro does not match the definition
in RSE. A paired macro, TFM_CRYPTO_EXPORT_PUBLIC_KEY, in the RSE's
header (located in interface/include/tfm_crypto_defs.h) is defined as
0x206. This causes the TF-A test PLATFORM_TEST=rse-rotpk to fail.
Correct the definition of RSE_CRYPTO_EXPORT_PUBLIC_KEY_SID to make the
test pass.
Change-Id: I0bc24ed6dd23f2718e1edea5ec464545dab06983
Signed-off-by: Leo Yan <leo.yan@arm.com>
Fix BL31 crashes caused by incorrect placement of firmware handoff code
within an assert. The function call has been removed from the assert to
ensure it’s executed even when assertions are disabled.
Change-Id: I668f5c08af33327e8ff0e22887c3da109bd6be31
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
* changes:
build(deps): bump certifi from 2023.7.22 to 2024.7.4
build(deps): bump idna from 3.4 to 3.7
build(deps): bump requests from 2.31.0 to 2.32.2
build(deps): bump jinja2 from 3.1.2 to 3.1.4
build(deps): bump urllib3 from 2.0.2 to 2.2.2
build(deps): bump pip from 23.1.2 to 23.3
By tracing instruction execution, it is observed:
Placing plat_my_core_pos at top of functions translate by the compiler
into calling those functions even if the result is not consumed when not
printed.
plat_my_core_pos is used to retrieve the core id for the currently
running core, but effectively call sites are only consuming it for
verbosity purposes. Move plat_my_core_pos calls into the print functions
that require it.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Ia3549453b5e4de7c575a8887a4d19e318658d03e
As observed by tracing instruction execution the SMC_RET18
macro in spmd_smc_switch_state calls cm_get_context, however the
compiler expands it to multiple individual non-inlined calls to
this same function. Store the result of cm_get_context into a local
variable and use it in the macro such that this function is only called
once.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Ib4fa63aced2f07c67c057f54fef3780c85e91df7
spmd_get_context_by_mpidr calls plat_core_pos_by_mpidr defined in
platform's fvp_topology. This involves a lot of intricated inner calls
including access to power controller (taking/releasing a bakery lock).
Remove dependency from this function, and use plat_my_core_pos instead.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I8e91858922e339de51056dba8803db74c8fd7420
Keeping the MTE2 enablement under the SPMD check is breaking for FPGA
and CI test, as SPMD is absent in these cases.
Enable MTE2 unconditionally so that all the supported platforms can use
it.
Change-Id: Id86893f0e2767a8686c3dca0ea092907d5c107ba
Signed-off-by: Tintu Thomas <tintu.thomas@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
Set the parent for ARM PLL and MC_CGM muxes as part of the early clocks
enablement.
Change-Id: If88186caad520c3f7bb1fb602de526d940037a1c
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
The MC_CGM1 clock objects will participate in A53 clocking.
Change-Id: I7309b630d72ac0ad66df7c299b678454220e0581
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
On S32CC SoCs, the set_parent operation will be used on clock modules
that are mux instances in order to establish the clock source. This will
be used for PLLs and MC_CGM muxes.
Change-Id: I7228d379500ea790459b858da8fc0bdcbed4fd62
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
Add all the clock objects needed to describe the ARM PLL, which can be
powered by either FXOSC or FIRC oscillators.
Change-Id: I2585ed38178ca1d5c5485adb38af1b3b8d94f1f6
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
Add the low-level implementation to enable the FXOSC oscillator, which
is disabled by default when booting the SoC. It will be used by PLLs,
for which support will be added later.
Change-Id: Ie784e4e29b8b4453b39d37594c311af940bebf92
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
TZC is being replaced by MSF module on TC3. For fixing boot failure on
TC3, don't enable TZC module on the TC3 platform.
Change-Id: I4434cb28bf523be8dd882f5f8799223642822ee2
Signed-off-by: Tintu Thomas <tintu.thomas@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
load_mbr_header() casts an unaligned pointer to (mbr_entry_t *) then
dereferences struct members with non-trivial alignment requirements.
This causes a bl2 with BOOT_DEVICE=emmc to hang when compiled with clang
18.1.5, although it works when compiled with gcc 14.1.0. Presumably gcc's
-mstrict-align papers over the undefined behaviour whereas clang's doesn't.
Replace the unaligned cast with a safe memcpy() into an mbr_entry_t.
Signed-off-by: Chris Webb <chris@arachsys.com>
Change-Id: Iefd4dac7e390ddf369b8dacdbaf14e599118f91d
The target_locality attribute is meant to specify that
a certain SW component is expected to run and thereby
send DPE commands from a given security domain. The DPE
service must be capable of determining the locality of
a client on his own. RSE determines the client's locality
based on the MHU channel used for communication.
If the expected locality (specified by the parent component)
is not matching with the determined locality by DPE
service then command fails.
The goal is to protect against spoofing when a
context_handle is stolen and used by a component
that should not have access.
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I96d255de231611cfed10eef4335a47b91c2c94de
The new name is more generic. The goal to add here
all platform dependent defines / data / config which
is DPE related.
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I5b521932c45d8a9c43ea2344dde83c210801cfee
Add links to official STMicroelectronics documentation (STM32MP2
series presentation and wiki).
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I2fca0da56bc6064c222df34493921dff3e119a22
STM32MP25xA & STM32MP25xC versions run at 1.2GHz.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I75aea682c8e3fa89e7ac1347bb7f9d02f2086222
Add TC specific stubs for both soc_css_init_nic400 and
soc_css_init_pcie. We do not require any initialisation of these
components for TC platforms.
Change-Id: If0129acd1050a56878cb9c3041a033192c88da57
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
s32cc_init_early_clks will be used to increase the frequency of the
clocks which have a performance impact on BL2 boot. This set includes
A53, XBAR, DDR and Linflex clocks. For now, it will only contain the
frequency set for FXOSC. More clock management will be added in the next
commits.
Change-Id: Ie85465884de02f5082185f91749f190f40249c2e
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
The set_rate callback will now be applied to FIRC, FXOSC, and SIRC
oscillators. It is a prerequisite for the upcoming commits that will
utilize this capability.
Change-Id: I82d1545c63b3e15497c1c002ff9ec0d7bf990aa0
Signed-off-by: Ciprian Costea <ciprianmarian.costea@nxp.com>
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
Madhukar Pappireddy
Manish Pandey
Manish V Badarkhe
Leo Yan
Harrison Mutai
Olivier Deprez
dependabot[bot]
Tintu Thomas
Ghennadi Procopciuc
Chris Webb
Tamas Ban
Yann Gautier
Nicolas Le Bayon
Jackson Cooper-Driver
Soby Mathew