Tree:
c984123669
dependabot/npm_and_yarn/word-wrap-1.2.4
dependabot/pip/docs/markdown-it-py-2.2.0
dependabot/pip/requests-2.31.0
dependabot/pip/urllib3-2.0.6
master
arm_cca_v0.1
arm_cca_v0.2
arm_cca_v0.3
for-v0.4-rc0
for-v0.4/05.20
for-v0.4/05.21
for-v0.4/05.22
lts-test
lts-v2.10.1
lts-v2.10.2
lts-v2.10.3
lts-v2.10.4
lts-v2.8-rc0
lts-v2.8.0
lts-v2.8.1
lts-v2.8.10
lts-v2.8.11
lts-v2.8.12
lts-v2.8.13
lts-v2.8.14
lts-v2.8.15
lts-v2.8.16
lts-v2.8.17
lts-v2.8.18
lts-v2.8.2
lts-v2.8.3
lts-v2.8.4
lts-v2.8.5
lts-v2.8.6
lts-v2.8.7
lts-v2.8.8
lts-v2.8.9
sandbox/lts-v2.10.3-20240319T0822
sandbox/lts-v2.10.3-20240319T1236
sandbox/lts-v2.10.3-20240404T0850
sandbox/lts-v2.10.3-20240405T0714
sandbox/lts-v2.10.3-test1
v0.2
v0.3
v0.3-Juno
v0.3-Juno-0.2
v0.3-Juno-0.3
v0.4
v0.4-Juno-0.4
v0.4-Juno-0.4-rc0
v0.4-Juno-0.5
v0.4-Juno-0.5-rc0
v0.4-Juno-0.5-rc1
v0.4-Juno-0.6-rc0
v0.4-Juno-0.6-rc1
v0.4-rc1
v0.4-rc2
v1.0
v1.0-rc0
v1.1
v1.1-Juno-0.1
v1.1-rc0
v1.1-rc1
v1.1-rc2
v1.1-rc3
v1.2
v1.2-rc0
v1.3
v1.3-rc0
v1.3_rc1
v1.3_rc2
v1.4
v1.4-rc0
v1.5
v1.5-rc0
v1.5-rc1
v1.5-rc2
v1.5-rc3
v1.6
v1.6-rc0
v1.6-rc1
v2.0
v2.0-rc0
v2.1
v2.1-rc0
v2.1-rc1
v2.10
v2.10-rc0
v2.10-rc1
v2.10.0
v2.2
v2.2-rc0
v2.2-rc1
v2.2-rc2
v2.3
v2.3-rc0
v2.3-rc1
v2.3-rc2
v2.4
v2.4-rc0
v2.4-rc1
v2.4-rc2
v2.5
v2.5-rc0
v2.5-rc1
v2.6
v2.6-rc0
v2.6-rc1
v2.7
v2.7-rc0
v2.7-rc1
v2.7.0
v2.8
v2.8-rc0
v2.8.0
v2.9
v2.9-rc0
v2.9-rc1
v2.9.0
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1 Commits (c984123669a7ba7b8d1dc168db8e130ee52bbb1e)
| Author | SHA1 | Message | Date |
|---|---|---|---|
Johann Neuhauser
|
51e223058f |
feat(stm32mp15-fdts): add Avenger96 board with STM32MP157A DHCOR SoM
This should replace the stm32mp157a-avenger96.dts with the new device tree files split into the STM32MP15 DHCOR SoM definition and the Avenger96 baseboard like it's done in Linux and U-Boot. Differences to stm32mp157a-avenger96.dts: - Enable sdmmc2 for booting from eMMC - improved clock settings like in U-Boot commit b6055945 "ARM: dts: stm32: Adjust PLL4 settings on AV96 again" - improved DDR settings for DHSOMs like in U-Boot commit 92ca0f74 "ARM: dts: stm32: Synchronize DDR setttings on DH SoMs" TF-A with this new dts(i) files on this board was fully tested with the latest OP-TEE developer setup. Change-Id: I85ce8eca7747965af3555fc19fd7b192dc3e5740 Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com> |
2 years ago |