Correct the warning due to comparison between signed and
unsigned variable.
drivers/auth/mbedtls/mbedtls_x509_parser.c: In function 'get_ext':
drivers/auth/mbedtls/mbedtls_x509_parser.c:120:30:
error: comparison of integer expressions of different
signedness: 'int' and 'size_t' {aka 'unsigned int'}
[-Werror=sign-compare]
120 | if ((oid_len == strlen(oid_str)) && !strcmp(oid, oid_str)) {
| ^~
Change-Id: Ic12527f5f92a34e925bee3047c168eacf5e99d8a
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
In some platform the digest of the public key saved in the OTP is not
the digest of the exact same public key buffer needed to check the
signature. Typically, platform checks signature using the DER ROTPK
whereas some others add some related information. Add a new platform
weak function to transform the public key buffer used by
verify_signature to a platform specific public key.
Mark this new weak function as deprecated as it will be replaced
by another framework implementation.
Change-Id: I71017b41e3eca9398cededf317ad97e9b511be5f
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Updated cert_tool to be able to select brainpool P256r/t1
or NIST prim256v1 curve for certificates signature.
Change-Id: I6e800144697069ea83660053b8ba6e21c229243a
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
* changes:
fix(mt8188): add mmap entry for CPU idle SRAM
fix(mt8188): refine gic init flow after system resume
fix(mt8186): fix the DRAM voltage after the system resumes
feat(mt8188): add audio support
refactor(mt8195): use ptp3 common drivers
feat(mt8188): add support for PTP3
feat(mt8188): enable MTK_PUBEVENT_ENABLE
Initialize RNG driver at platform level for STM32MP13.
Change-Id: I64832de43e5f6559a12e26680142db54c88f0b9e
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
Remove unused mode for HASH driver. The driver will only be
used in BL2 scope.
Change-Id: I1fce09cdaa9da0c11554ac5f73433b4bee776011
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Add the crypto library for STM32MP1 to use STM32 hardware
accelerators.
Change-Id: I0bbb941001242a6fdc47514ab3efe07b12249285
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
This driver manages the STM32 Random Number Generator
peripheral.
Change-Id: I4403ebb2dbdaa8df993a4413f1ef48eeba00427c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Add code to be able to use STMicroelectronics SAES IP. This driver
can manage many AES algorithms (CBC, ECB, CCM, GCM). It will be used
by the authenticated decryption framework (AES-GCM only).
Change-Id: Ibd4030719fb12877dcecd5d2c395d13b4b15c260
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Add code to be able to use STMicroelectronics PKA peripheral
in the authentication framework.
Change-Id: Ifeafe84c68db483cd18674f2280576cc065f92ee
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Introduce new flag to manage hardware version.
STM32MP15 currently uses the HASH_V2 and STM32MP13 uses the HASH_V4.
For STM32_HASH_V4: remove MD5 algorithm (no more supported) and
add SHA384 and SHA512.
For STM32_HASH_V2: no change.
Change-Id: I3a9ae9e38249a2421c657232cb0877004d04dae1
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
CPU PM driver accesses CPU idle SRAM during the system suspend
process. The region of CPU idle SRAM needs to be added as mmap entry.
Otherwise, the execption would occur.
BUG=b:244215539
TEST=Test of suspend resume passes.
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
Change-Id: I5838964fd9cb1b833e4006e2123febb4a4601003
Call gicv3_distif_init() instead of mt_gic_init() in
armv8_2_mcusys_pwr_on_common(). This is to prevent
gicv3_rdistif_init() and gicv3_cpuif_enable() from being called twice
in the power-on flow. gicv3_rdistif_init() and gicv3_cpuif_enable()
are called in later armv8_2_cpu_pwr_on_common().
BUG=b:244215539
TEST=Suspend Resume Test pass
Change-Id: Id752c1ccbb9eab277ed6278c2dd90a051a894146
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
The DRAM power supply must sustain at 0.8V after the system resumes.
Otherwise, unexpected errors would occur. Therefore, we update the
DRAM voltage to 0.8v in PMIC voltage wrap table.
BUG=b:253537849
TEST=Suspend Resume Test
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.corp-partner.google.com>
Change-Id: Idd42d5a2d646468822e391e48d01d870c3b7f0d3
For MT8188, MTK_AUDIO_SMC_OP_DOMAIN_SIDEBANDS is required for normal
mode switch.
- Add audio common code and chip specific code.
- Add new id (MTK_SIP_AUDIO_CONTROL) to mtk_sip_def.h.
- Enable for MT8188.
Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Change-Id: Iff4680cd0b520b2b519ecf30ecafe100f147cc62
Some 8195 ptp3 drivers are the same in plat/mediatek/drivers/ptp3, so
add this patch to reuse them.
Change-Id: I2b1801a73b6a2979e20d49d314c57f663dc5bf04
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
Add PTP3 driver to protect CPU from excessive voltage drop in CPU
heavy loading.
Signed-off-by: Riven Chen <riven.chen@mediatek.corp-partner.google.com>
Change-Id: I394096be43e1d1d615f99b22f38f0b3ae0bb40c1
Enable MTK_PUBEVENT_ENABLE for subscribing CPUPM events. This
patch also corrects the header file naming.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: Iabd89a4ead21ccafa833390367484bfea5d351f6
When updated to work with OpenSSL 3.0, the host tools lost their
compatibility with previous versions (1.x) of OpenSSL. This is
mainly due to the fact that 1.x APIs became deprecated in 3.0 and
therefore their use cause compiling errors. In addition, updating
for a newer version of OpenSSL meant improving the stability
against security threats. However, although version 1.1.1 is
now deprecated, it still receives security updates, so it would
not imply major security issues to keep compatibility with it too.
This patch adds backwards compatibility with OpenSSL 1.x versions
by adding back 1.x API code. It defines a macro USING_OPENSSL3,
which will select the appropriate OpenSSL API version depending on
the OpenSSL library path chosen (which is determined by the
already-existing OPENSSL_DIR variable).
In addition, cleanup items were packed in functions and moved to
the proper modules in order to make the code more maintainable and
legible.
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>
Change-Id: I8deceb5e419edc73277792861882404790ccd33c
When TF-A is set to save and restore EL2 registers it initially zeroes
all of them so that it does not leak any information. However,
MDCR_EL2.HPMN of 0 is poorly defined when FEAT_HPMN0 is not implemented.
Set it to its hardware reset value so that lower ELs don't inherit a
wrong value.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I8055005ef9b6eaafefa13b62a0b41289079fdd23
Arm has decided to deprecate the TC0 platform. The development of
software and fast models for TC0 platform has been discontinued.
TC0 platform has been superseded by the TC1 and TC2 platforms,
which are already supported in TF-A and CI repositories.
Change-Id: I0269816a6ee733f732669027eae4e14cd60b6084
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
As part of release process revisit list of maintainers to keep
it updated.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I63b87265a6bff00ad05d8b3b7cad694cdf48e9ea
Couple for urls under section: `5.6. Use of built-in C and libc
data types` from docs has broken urls since the new arm procedure
call doc is moved to be part of `ARM-software/abi-aa`.
Change-Id: Ied184ed56c8335d4cbc687e56962439091a18e42
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Cortex-A77 erratum 2743100 is a Cat B erratum that applies to revisions
r0p0, r1p0, r1p1, and is still open. The workaround is to insert a dsb
before the isb in the power down sequence.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN1152370/latest
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I8e49a2dac8611f31ace249a17ae7a90cd60e742a
When a core is in debug recovery mode its caches are not invalidated
upon reset, so the L1 and L2 cache contents from before reset are
observable after reset. Similarly, debug recovery mode of DynamIQ
cluster ensures that contents of the shared L3 cache are also not
invalidated upon transition to On mode.
Booting cores in debug recovery mode means booting with caches disabled
and preserving the caches until a point where software can dump the
caches and retrieve their contents. TF-A however unconditionally cleans
and invalidates caches at multiple points during boot. This can lead to
memory corruption as well as loss of cache contents to be used for
debugging.
This patch fixes this by calling a platform hook before performing CMOs
in helper routines in cache_helpers.S. The platform hook plat_can_cmo is
an assembly routine which must not clobber x2 and x3, and avoid using
stack. The whole checking is conditional upon `CONDITIONAL_CMO` which
can be set at compile time.
Signed-off-by: Okash Khawaja <okash@google.com>
Change-Id: I172e999e4acd0f872c24056e647cc947ee54b193
Add documentation to build and run TF-A with RMM,
Linux kernel and TFTF Realm Payload.
Signed-off-by: Shruti Gupta <shruti.gupta@arm.com>
Change-Id: I951b41a144aabe0fec16eb933d7f005a65f06fb2
We used to have a dedicated page for deprecated platforms information.
This document contained 2 pieces of information:
a) the process for deprecating a platform port;
b) the list of deprecated platforms to this day.
I think it makes more sense to move b) to the platforms ports landing
page, such that it is more visible.
This also has the nice effect to move the 'Deprecated platforms' title
as the last entry of the 'Platform ports' table of contents, like so:
- Platform ports
- 1. Allwinner ARMv8 SoCs
- 2. Arm Development Platforms
...
- 39. Broadcom Stingray
- Deprecated platforms
instead of it being lost in the middle of supported platform ports.
Regarding a), this gets moved under the "Processes & Policies" section.
More specifically, it gets clubbed with the existing platform
compatibility policy. The combined document gets renamed into a
"Platforms Ports Policy" document.
Change-Id: I6e9ce2abc68b8a8ac88e7bd5f21749c14c9a2af6
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Nicolas Toromanoff
Lionel Debieve
Manish Pandey
Nicolas Le Bayon
Yann Gautier
Liju-Clr Chen
James Liao
Allen-KH Cheng
Trevor Wu
Riven Chen
Rex-BC Chen
Manish V Badarkhe
Juan Pablo Conde
Bipin Ravi
Boyan Karatotev
Joanna Farley
Olivier Deprez
Govindraj Raja
Okash Khawaja
Sandrine Bailleux
Madhukar Pappireddy
Soby Mathew
Shruti Gupta
Michal Simek