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155 lines
5.9 KiB
155 lines
5.9 KiB
/*
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* Copyright (c) 2014-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef INTERRUPT_MGMT_H
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#define INTERRUPT_MGMT_H
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#include <arch.h>
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#include <lib/utils_def.h>
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/*******************************************************************************
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* Constants for the types of interrupts recognised by the IM framework
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******************************************************************************/
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#define INTR_TYPE_S_EL1 U(0)
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#define INTR_TYPE_EL3 U(1)
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#define INTR_TYPE_NS U(2)
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#define MAX_INTR_TYPES U(3)
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#define INTR_TYPE_INVAL MAX_INTR_TYPES
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/* Interrupt routing modes */
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#define INTR_ROUTING_MODE_PE 0
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#define INTR_ROUTING_MODE_ANY 1
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/*
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* Constant passed to the interrupt handler in the 'id' field when the
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* framework does not read the gic registers to determine the interrupt id.
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*/
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#define INTR_ID_UNAVAILABLE U(0xFFFFFFFF)
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/*******************************************************************************
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* Mask for _both_ the routing model bits in the 'flags' parameter and
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* constants to define the valid routing models for each supported interrupt
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* type
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******************************************************************************/
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#define INTR_RM_FLAGS_SHIFT U(0x0)
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#define INTR_RM_FLAGS_MASK U(0x3)
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/* Routed to EL3 from NS. Taken to S-EL1 from Secure */
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#define INTR_SEL1_VALID_RM0 U(0x2)
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/* Routed to EL3 from NS and Secure */
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#define INTR_SEL1_VALID_RM1 U(0x3)
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/* Routed to EL1/EL2 from NS and to S-EL1 from Secure */
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#define INTR_NS_VALID_RM0 U(0x0)
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/* Routed to EL1/EL2 from NS and to EL3 from Secure */
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#define INTR_NS_VALID_RM1 U(0x1)
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/* Routed to EL3 from NS. Taken to S-EL1 from Secure and handed over to EL3 */
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#define INTR_EL3_VALID_RM0 U(0x2)
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/* Routed to EL3 from NS and Secure */
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#define INTR_EL3_VALID_RM1 U(0x3)
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/* This is the default routing model */
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#define INTR_DEFAULT_RM U(0x0)
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/*******************************************************************************
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* Constants for the _individual_ routing model bits in the 'flags' field for
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* each interrupt type and mask to validate the 'flags' parameter while
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* registering an interrupt handler
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******************************************************************************/
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#define INTR_TYPE_FLAGS_MASK U(0xFFFFFFFC)
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#define INTR_RM_FROM_SEC_SHIFT SECURE /* BIT[0] */
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#define INTR_RM_FROM_NS_SHIFT NON_SECURE /* BIT[1] */
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#define INTR_RM_FROM_FLAG_MASK U(1)
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#define get_interrupt_rm_flag(flag, ss) \
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((((flag) >> INTR_RM_FLAGS_SHIFT) >> (ss)) & INTR_RM_FROM_FLAG_MASK)
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#define set_interrupt_rm_flag(flag, ss) ((flag) |= U(1) << (ss))
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#define clr_interrupt_rm_flag(flag, ss) ((flag) &= ~(U(1) << (ss)))
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/*******************************************************************************
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* Macros to set the 'flags' parameter passed to an interrupt type handler. Only
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* the flag to indicate the security state when the exception was generated is
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* supported.
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******************************************************************************/
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#define INTR_SRC_SS_FLAG_SHIFT U(0) /* BIT[0] */
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#define INTR_SRC_SS_FLAG_MASK U(1)
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#define set_interrupt_src_ss(flag, val) ((flag) |= (val) << INTR_SRC_SS_FLAG_SHIFT)
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#define clr_interrupt_src_ss(flag) ((flag) &= ~(U(1) << INTR_SRC_SS_FLAG_SHIFT))
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#define get_interrupt_src_ss(flag) (((flag) >> INTR_SRC_SS_FLAG_SHIFT) & \
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INTR_SRC_SS_FLAG_MASK)
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#ifndef __ASSEMBLER__
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#include <errno.h>
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#include <stdint.h>
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/*******************************************************************************
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* Helpers to validate the routing model bits in the 'flags' for a type
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* of interrupt. If the model does not match one of the valid masks
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* -EINVAL is returned.
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******************************************************************************/
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static inline int32_t validate_sel1_interrupt_rm(uint32_t x)
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{
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if ((x == INTR_SEL1_VALID_RM0) || (x == INTR_SEL1_VALID_RM1))
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return 0;
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return -EINVAL;
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}
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static inline int32_t validate_ns_interrupt_rm(uint32_t x)
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{
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if ((x == INTR_NS_VALID_RM0) || (x == INTR_NS_VALID_RM1))
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return 0;
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return -EINVAL;
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}
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static inline int32_t validate_el3_interrupt_rm(uint32_t x)
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{
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#if EL3_EXCEPTION_HANDLING && !(defined(SPD_spmd) && (SPMD_SPM_AT_SEL2 == 1))
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/*
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* With EL3 exception handling, EL3 interrupts are always routed to EL3
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* from both Secure and Non-secure, when the SPMC does not live in S-EL2.
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* Therefore INTR_EL3_VALID_RM1 is the only valid routing model.
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*/
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if (x == INTR_EL3_VALID_RM1)
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return 0;
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#else
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/*
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* When EL3_EXCEPTION_HANDLING is not defined both routing modes are
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* valid. This is the most common case. The exception to this rule is
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* when EL3_EXCEPTION_HANDLING is defined but also when the SPMC lives
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* at S-EL2. In this case, Group0 Interrupts are trapped to the SPMC
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* when running in S-EL0 and S-EL1. The SPMC may handle the interrupt
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* itself, delegate it to an SP or forward to EL3 for handling.
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*/
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if ((x == INTR_EL3_VALID_RM0) || (x == INTR_EL3_VALID_RM1))
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return 0;
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#endif
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return -EINVAL;
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}
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/*******************************************************************************
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* Prototype for defining a handler for an interrupt type
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******************************************************************************/
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typedef uint64_t (*interrupt_type_handler_t)(uint32_t id,
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uint32_t flags,
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void *handle,
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void *cookie);
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/*******************************************************************************
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* Function & variable prototypes
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******************************************************************************/
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u_register_t get_scr_el3_from_routing_model(uint32_t security_state);
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int32_t set_routing_model(uint32_t type, uint32_t flags);
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int32_t register_interrupt_type_handler(uint32_t type,
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interrupt_type_handler_t handler,
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uint32_t flags);
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interrupt_type_handler_t get_interrupt_type_handler(uint32_t type);
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int disable_intr_rm_local(uint32_t type, uint32_t security_state);
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int enable_intr_rm_local(uint32_t type, uint32_t security_state);
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#endif /*__ASSEMBLER__*/
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#endif /* INTERRUPT_MGMT_H */
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