arm-trusted-firmware

Vikram Kanigiri 12e7c4ab0b Initialise cpu ops after enabling data cache The cpu-ops pointer was initialized before enabling the data cache in the cold and warm boot paths. This required a DCIVAC cache maintenance operation to invalidate any stale cache lines resident in other cpus. This patch moves this initialization to the bl31_arch_setup() function which is always called after the data cache and MMU has been enabled. This change removes the need: 1. for the DCIVAC cache maintenance operation. 2. to initialise the CPU ops upon resumption from a PSCI CPU_SUSPEND call since memory contents are always preserved in this case. Change-Id: Ibb2fa2f7460d1a1f1e721242025e382734c204c6	10 years ago
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aarch64	Initialise cpu ops after enabling data cache	10 years ago
cpu-ops.mk	Optimize Cortex-A57 cluster power down sequence on Juno	10 years ago

Vikram Kanigiri 12e7c4ab0b Initialise cpu ops after enabling data cache

The cpu-ops pointer was initialized before enabling the data cache in the cold
and warm boot paths. This required a DCIVAC cache maintenance operation to
invalidate any stale cache lines resident in other cpus.

This patch moves this initialization to the bl31_arch_setup() function
which is always called after the data cache and MMU has been enabled.

This change removes the need:
 1. for the DCIVAC cache maintenance operation.
 2. to initialise the CPU ops upon resumption from a PSCI CPU_SUSPEND
    call since memory contents are always preserved in this case.

Change-Id: Ibb2fa2f7460d1a1f1e721242025e382734c204c6

10 years ago

aarch64

Initialise cpu ops after enabling data cache

10 years ago

cpu-ops.mk

Optimize Cortex-A57 cluster power down sequence on Juno

10 years ago