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70 lines
2.2 KiB
70 lines
2.2 KiB
/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __HI6220_H__
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#define __HI6220_H__
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#include <hi6220_regs_acpu.h>
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#include <hi6220_regs_ao.h>
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#include <hi6220_regs_peri.h>
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#include <hi6220_regs_pin.h>
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#include <hi6220_regs_pmctrl.h>
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/*******************************************************************************
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* Implementation defined ACTLR_EL2 bit definitions
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******************************************************************************/
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#define ACTLR_EL2_L2ACTLR_BIT (1 << 6)
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#define ACTLR_EL2_L2ECTLR_BIT (1 << 5)
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#define ACTLR_EL2_L2CTLR_BIT (1 << 4)
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#define ACTLR_EL2_CPUECTLR_BIT (1 << 1)
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#define ACTLR_EL2_CPUACTLR_BIT (1 << 0)
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/*******************************************************************************
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* Implementation defined ACTLR_EL3 bit definitions
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******************************************************************************/
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#define ACTLR_EL3_L2ACTLR_BIT (1 << 6)
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#define ACTLR_EL3_L2ECTLR_BIT (1 << 5)
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#define ACTLR_EL3_L2CTLR_BIT (1 << 4)
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#define ACTLR_EL3_CPUECTLR_BIT (1 << 1)
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#define ACTLR_EL3_CPUACTLR_BIT (1 << 0)
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/*******************************************************************************
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* CCI-400 related constants
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******************************************************************************/
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#define CCI400_BASE 0xF6E90000
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#define CCI400_SL_IFACE3_CLUSTER_IX 3
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#define CCI400_SL_IFACE4_CLUSTER_IX 4
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#define DWMMC0_BASE 0xF723D000
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#define DWUSB_BASE 0xF72C0000
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#define PMUSSI_BASE 0xF8000000
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#define SP804_TIMER0_BASE 0xF8008000
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#define GPIO0_BASE 0xF8011000
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#define GPIO1_BASE 0xF8012000
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#define GPIO2_BASE 0xF8013000
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#define GPIO3_BASE 0xF8014000
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#define GPIO4_BASE 0xF7020000
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#define GPIO5_BASE 0xF7021000
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#define GPIO6_BASE 0xF7022000
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#define GPIO7_BASE 0xF7023000
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#define GPIO8_BASE 0xF7024000
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#define GPIO9_BASE 0xF7025000
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#define GPIO10_BASE 0xF7026000
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#define GPIO11_BASE 0xF7027000
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#define GPIO12_BASE 0xF7028000
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#define GPIO13_BASE 0xF7029000
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#define GPIO14_BASE 0xF702A000
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#define GPIO15_BASE 0xF702B000
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#define GPIO16_BASE 0xF702C000
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#define GPIO17_BASE 0xF702D000
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#define GPIO18_BASE 0xF702E000
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#define GPIO19_BASE 0xF702F000
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#endif /* __HI6220_H__ */
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