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132 lines
3.1 KiB
132 lines
3.1 KiB
/*
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* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/debug.h>
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#include <common/runtime_svc.h>
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#include <lib/cpus/errata_report.h>
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#include <lib/cpus/wa_cve_2017_5715.h>
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#include <lib/cpus/wa_cve_2018_3639.h>
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#include <lib/smccc.h>
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#include <services/arm_arch_svc.h>
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#include <smccc_helpers.h>
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static int32_t smccc_version(void)
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{
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return MAKE_SMCCC_VERSION(SMCCC_MAJOR_VERSION, SMCCC_MINOR_VERSION);
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}
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static int32_t smccc_arch_features(u_register_t arg)
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{
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switch (arg) {
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case SMCCC_VERSION:
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case SMCCC_ARCH_FEATURES:
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return SMC_OK;
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#if WORKAROUND_CVE_2017_5715
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case SMCCC_ARCH_WORKAROUND_1:
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if (check_wa_cve_2017_5715() == ERRATA_NOT_APPLIES)
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return 1;
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return 0; /* ERRATA_APPLIES || ERRATA_MISSING */
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#endif
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#if WORKAROUND_CVE_2018_3639
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case SMCCC_ARCH_WORKAROUND_2: {
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#if DYNAMIC_WORKAROUND_CVE_2018_3639
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unsigned long long ssbs;
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/*
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* Firmware doesn't have to carry out dynamic workaround if the
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* PE implements architectural Speculation Store Bypass Safe
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* (SSBS) feature.
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*/
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ssbs = (read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_SSBS_SHIFT) &
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ID_AA64PFR1_EL1_SSBS_MASK;
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/*
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* If architectural SSBS is available on this PE, no firmware
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* mitigation via SMCCC_ARCH_WORKAROUND_2 is required.
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*/
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if (ssbs != SSBS_UNAVAILABLE)
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return 1;
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/*
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* On a platform where at least one CPU requires
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* dynamic mitigation but others are either unaffected
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* or permanently mitigated, report the latter as not
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* needing dynamic mitigation.
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*/
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if (wa_cve_2018_3639_get_disable_ptr() == NULL)
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return 1;
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/*
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* If we get here, this CPU requires dynamic mitigation
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* so report it as such.
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*/
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return 0;
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#else
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/* Either the CPUs are unaffected or permanently mitigated */
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return SMCCC_ARCH_NOT_REQUIRED;
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#endif
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}
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#endif
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/* Fallthrough */
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default:
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return SMC_UNK;
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}
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}
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/*
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* Top-level Arm Architectural Service SMC handler.
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*/
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static uintptr_t arm_arch_svc_smc_handler(uint32_t smc_fid,
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u_register_t x1,
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u_register_t x2,
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u_register_t x3,
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u_register_t x4,
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void *cookie,
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void *handle,
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u_register_t flags)
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{
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switch (smc_fid) {
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case SMCCC_VERSION:
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SMC_RET1(handle, smccc_version());
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case SMCCC_ARCH_FEATURES:
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SMC_RET1(handle, smccc_arch_features(x1));
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#if WORKAROUND_CVE_2017_5715
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case SMCCC_ARCH_WORKAROUND_1:
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/*
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* The workaround has already been applied on affected PEs
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* during entry to EL3. On unaffected PEs, this function
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* has no effect.
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*/
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SMC_RET0(handle);
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#endif
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#if WORKAROUND_CVE_2018_3639
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case SMCCC_ARCH_WORKAROUND_2:
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/*
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* The workaround has already been applied on affected PEs
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* requiring dynamic mitigation during entry to EL3.
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* On unaffected or statically mitigated PEs, this function
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* has no effect.
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*/
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SMC_RET0(handle);
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#endif
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default:
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WARN("Unimplemented Arm Architecture Service Call: 0x%x \n",
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smc_fid);
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SMC_RET1(handle, SMC_UNK);
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}
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}
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/* Register Standard Service Calls as runtime service */
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DECLARE_RT_SVC(
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arm_arch_svc,
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OEN_ARM_START,
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OEN_ARM_END,
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SMC_TYPE_FAST,
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NULL,
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arm_arch_svc_smc_handler
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);
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