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96 lines
1.8 KiB
96 lines
1.8 KiB
/*
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* Copyright (c) 2016-2019, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <errno.h>
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#include <platform_def.h>
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#include <common/debug.h>
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#include <drivers/st/bsec.h>
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#include <drivers/st/stm32mp1_rcc.h>
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#include <lib/mmio.h>
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#include <lib/utils_def.h>
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#include <stm32mp1_dbgmcu.h>
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#define DBGMCU_IDC U(0x00)
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#define DBGMCU_APB4FZ1 U(0x2C)
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#define DBGMCU_IDC_DEV_ID_MASK GENMASK(11, 0)
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#define DBGMCU_IDC_REV_ID_MASK GENMASK(31, 16)
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#define DBGMCU_IDC_REV_ID_SHIFT 16
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#define DBGMCU_APB4FZ1_IWDG2 BIT(2)
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static uintptr_t get_rcc_base(void)
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{
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/* This is called before stm32mp_rcc_base() is available */
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return RCC_BASE;
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}
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static int stm32mp1_dbgmcu_init(void)
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{
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uint32_t dbg_conf;
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uintptr_t rcc_base = get_rcc_base();
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dbg_conf = bsec_read_debug_conf();
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if ((dbg_conf & BSEC_DBGSWGEN) == 0U) {
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uint32_t result = bsec_write_debug_conf(dbg_conf |
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BSEC_DBGSWGEN);
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if (result != BSEC_OK) {
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ERROR("Error enabling DBGSWGEN\n");
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return -1;
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}
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}
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mmio_setbits_32(rcc_base + RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
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return 0;
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}
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int stm32mp1_dbgmcu_get_chip_version(uint32_t *chip_version)
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{
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if (stm32mp1_dbgmcu_init() != 0) {
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return -EPERM;
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}
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*chip_version = (mmio_read_32(DBGMCU_BASE + DBGMCU_IDC) &
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DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT;
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return 0;
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}
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int stm32mp1_dbgmcu_get_chip_dev_id(uint32_t *chip_dev_id)
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{
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if (stm32mp1_dbgmcu_init() != 0) {
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return -EPERM;
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}
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*chip_dev_id = mmio_read_32(DBGMCU_BASE + DBGMCU_IDC) &
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DBGMCU_IDC_DEV_ID_MASK;
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return 0;
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}
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int stm32mp1_dbgmcu_freeze_iwdg2(void)
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{
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uint32_t dbg_conf;
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if (stm32mp1_dbgmcu_init() != 0) {
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return -EPERM;
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}
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dbg_conf = bsec_read_debug_conf();
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if ((dbg_conf & (BSEC_SPIDEN | BSEC_SPINDEN)) != 0U) {
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mmio_setbits_32(DBGMCU_BASE + DBGMCU_APB4FZ1,
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DBGMCU_APB4FZ1_IWDG2);
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}
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return 0;
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}
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