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70 lines
1.8 KiB
70 lines
1.8 KiB
/*
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* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdbool.h>
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#include <arch.h>
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#include <arch_helpers.h>
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#include <lib/cassert.h>
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#include <lib/el3_runtime/pubsub.h>
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#include <lib/extensions/sve.h>
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CASSERT(SVE_VECTOR_LEN <= 2048, assert_sve_vl_too_long);
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CASSERT(SVE_VECTOR_LEN >= 128, assert_sve_vl_too_short);
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CASSERT((SVE_VECTOR_LEN % 128) == 0, assert_sve_vl_granule);
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/*
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* Converts SVE vector size restriction in bytes to LEN according to ZCR_EL3 documentation.
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* VECTOR_SIZE = (LEN+1) * 128
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*/
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#define CONVERT_SVE_LENGTH(x) (((x / 128) - 1))
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static bool sve_supported(void)
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{
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uint64_t features;
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features = read_id_aa64pfr0_el1() >> ID_AA64PFR0_SVE_SHIFT;
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return (features & ID_AA64PFR0_SVE_MASK) == 1U;
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}
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void sve_enable(cpu_context_t *context)
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{
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u_register_t cptr_el3;
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if (!sve_supported()) {
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return;
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}
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cptr_el3 = read_ctx_reg(get_el3state_ctx(context), CTX_CPTR_EL3);
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/* Enable access to SVE functionality for all ELs. */
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cptr_el3 = (cptr_el3 | CPTR_EZ_BIT) & ~(TFP_BIT);
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write_ctx_reg(get_el3state_ctx(context), CTX_CPTR_EL3, cptr_el3);
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/* Restrict maximum SVE vector length (SVE_VECTOR_LEN+1) * 128. */
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write_ctx_reg(get_el3state_ctx(context), CTX_ZCR_EL3,
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(ZCR_EL3_LEN_MASK & CONVERT_SVE_LENGTH(SVE_VECTOR_LEN)));
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}
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void sve_disable(cpu_context_t *context)
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{
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u_register_t reg;
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el3_state_t *state;
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/* Make sure SME is implemented in hardware before continuing. */
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if (!sve_supported()) {
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return;
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}
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/* Get the context state. */
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state = get_el3state_ctx(context);
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/* Disable SVE and FPU since they share registers. */
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reg = read_ctx_reg(state, CTX_CPTR_EL3);
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reg &= ~CPTR_EZ_BIT; /* Trap SVE */
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reg |= TFP_BIT; /* Trap FPU/SIMD */
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write_ctx_reg(state, CTX_CPTR_EL3, reg);
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}
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