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268 lines
9.0 KiB
268 lines
9.0 KiB
Renesas R-Car
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=============
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"R-Car" is the nickname for Renesas' system-on-chip (SoC) family for
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car information systems designed for the next-generation of automotive
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computing for the age of autonomous vehicles.
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The scalable R-Car hardware platform and flexible software platform
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cover the full product range, from the premium class to the entry
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level. Plug-ins are available for multiple open-source software tools.
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Renesas R-Car Gen3 evaluation boards:
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-------------------------------------
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+------------+-----------------+-----------------------------+
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| | Standard | Low Cost Boards (LCB) |
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+============+=================+=============================+
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| R-Car H3 | - Salvator-X | - R-Car Starter Kit Premier |
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| | - Salvator-XS | |
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+------------+-----------------+-----------------------------+
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| R-Car M3-W | - Salvator-X | |
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| | - Salvator-XS | - R-Car Starter Kit Pro |
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+------------+-----------------+-----------------------------+
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| R-Car M3-N | - Salvator-X | |
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| | - Salvator-XS | |
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+------------+-----------------+-----------------------------+
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| R-Car V3M | - Eagle | - Starter Kit |
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+------------+-----------------+-----------------------------+
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| R-Car V3H | - Condor | - Starter Kit |
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+------------+-----------------+-----------------------------+
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| R-Car D3 | - Draak | |
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+------------+-----------------+-----------------------------+
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`boards info <https://elinux.org/R-Car>`__
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The current TF-A port has been tested on the R-Car H3 Salvator-X
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Soc_id r8a7795 revision ES1.1 (uses a Secure Payload Dispatcher)
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::
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ARM CA57 (ARMv8) 1.5 GHz quad core, with NEON/VFPv4, L1$ I/D
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48K/32K, L2$ 2MB
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ARM CA53 (ARMv8) 1.2 GHz quad core, with NEON/VFPv4, L1$ I/D 32K/32K,
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L2$ 512K
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Memory controller for LPDDR4-3200 4GB in 2 channels, each 64-bit wide
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Two- and three-dimensional graphics engines,
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Video processing units,
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3 channels Display Output,
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6 channels Video Input,
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SD card host interface,
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USB3.0 and USB2.0 interfaces,
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CAN interfaces
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Ethernet AVB
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PCI Express Interfaces
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Memories
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INTERNAL 384KB SYSTEM RAM
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DDR 4 GB LPDDR4
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HYPERFLASH 64 MB HYPER FLASH (512 MBITS, 160 MHZ, 320 MBYTES/S)
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QSPI FLASH 16MB QSPI (128 MBITS,80 MHZ,80 MBYTES/S)1 HEADER QSPI
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MODULE
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EMMC 32 GB EMMC (HS400 240 MBYTES/S)
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MICROSD-CARD SLOT (SDR104 100 MBYTES/S)
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Overview
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--------
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On the rcar-gen3 the BOOTROM starts the cpu at EL3; for this port BL2
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will therefore be entered at this exception level (the Renesas' ATF
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reference tree [1] resets into EL1 before entering BL2 - see its
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bl2.ld.S)
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BL2 initializes DDR (and on some platforms i2c to interface to the
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PMIC) before determining the boot reason (cold or warm).
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During suspend all CPUs are switched off and the DDR is put in backup
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mode (some kind of self-refresh mode). This means that BL2 is always
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entered in a cold boot scenario.
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Once BL2 boots, it determines the boot reason, writes it to shared
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memory (BOOT_KIND_BASE) together with the BL31 parameters
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(PARAMS_BASE) and jumps to BL31.
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To all effects, BL31 is as if it is being entered in reset mode since
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it still needs to initialize the rest of the cores; this is the reason
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behind using direct shared memory access to BOOT_KIND_BASE _and_
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PARAMS_BASE instead of using registers to get to those locations (see
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el3_common_macros.S and bl31_entrypoint.S for the RESET_TO_BL31 use
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case).
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Depending on the boot reason BL31 initializes the rest of the cores:
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in case of suspend, it uses a MBOX memory region to recover the
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program counters.
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[1] https://github.com/renesas-rcar/arm-trusted-firmware
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How to build
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------------
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The TF-A build options depend on the target board so you will have to
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refer to those specific instructions. What follows is customized to
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the H3 SiP Salvator-X development system used in this port.
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Build Tested:
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~~~~~~~~~~~~~
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RCAR_OPT="LSI=H3 RCAR_DRAM_SPLIT=1 RCAR_LOSSY_ENABLE=1"
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MBEDTLS_DIR=$mbedtls_src
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$ MBEDTLS_DIR=$mbedtls_src_tree make clean bl2 bl31 rcar_layout_tool \
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PLAT=rcar ${RCAR_OPT} SPD=opteed
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System Tested:
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~~~~~~~~~~~~~~
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* mbed_tls:
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git@github.com:ARMmbed/mbedtls.git [devel]
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commit 552754a6ee82bab25d1bdf28c8261a4518e65e4d
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Merge: 68dbc94 f34a4c1
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Author: Simon Butcher <simon.butcher@arm.com>
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Date: Thu Aug 30 00:57:28 2018 +0100
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* optee_os:
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https://github.com/BayLibre/optee_os
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Until it gets merged into OP-TEE, the port requires Renesas'
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Trusted Environment with a modification to support power
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management.
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commit 80105192cba9e704ebe8df7ab84095edc2922f84
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Author: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
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Date: Thu Aug 30 16:49:49 2018 +0200
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plat-rcar: cpu-suspend: handle the power level
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Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
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* u-boot:
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The port has beent tested using mainline uboot.
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commit 4cdeda511f8037015b568396e6dcc3d8fb41e8c0
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Author: Fabio Estevam <festevam@gmail.com>
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Date: Tue Sep 4 10:23:12 2018 -0300
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* linux:
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The port has beent tested using mainline kernel.
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commit 7876320f88802b22d4e2daf7eb027dd14175a0f8
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Author: Linus Torvalds <torvalds@linux-foundation.org>
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Date: Sun Sep 16 11:52:37 2018 -0700
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Linux 4.19-rc4
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TF-A Build Procedure
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~~~~~~~~~~~~~~~~~~~~
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- Fetch all the above 4 repositories.
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- Prepare the AARCH64 toolchain.
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- Build u-boot using r8a7795_salvator-x_defconfig.
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Result: u-boot-elf.srec
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.. code:: bash
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make CROSS_COMPILE=aarch64-linux-gnu-
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r8a7795_salvator-x_defconfig
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make CROSS_COMPILE=aarch64-linux-gnu-
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- Build atf
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Result: bootparam_sa0.srec, cert_header_sa6.srec, bl2.srec, bl31.srec
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.. code:: bash
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RCAR_OPT="LSI=H3 RCAR_DRAM_SPLIT=1 RCAR_LOSSY_ENABLE=1"
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MBEDTLS_DIR=$mbedtls_src_tree make clean bl2 bl31 rcar \
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PLAT=rcar ${RCAR_OPT} SPD=opteed
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- Build optee-os
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Result: tee.srec
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.. code:: bash
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make -j8 PLATFORM="rcar" CFG_ARM64_core=y
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Install Procedure
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~~~~~~~~~~~~~~~~~
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- Boot the board in Mini-monitor mode and enable access to the
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Hyperflash.
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- Use the XSL2 Mini-monitor utility to accept all the SREC ascii
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transfers over serial.
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Boot trace
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----------
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Notice that BL31 traces are not accessible via the console and that in
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order to verbose the BL2 output you will have to compile TF-A with
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LOG_LEVEL=50 and DEBUG=1
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::
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Initial Program Loader(CA57) Rev.1.0.22
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NOTICE: BL2: PRR is R-Car H3 Ver.1.1
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NOTICE: BL2: Board is Salvator-X Rev.1.0
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NOTICE: BL2: Boot device is HyperFlash(80MHz)
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NOTICE: BL2: LCM state is CM
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NOTICE: AVS setting succeeded. DVFS_SetVID=0x53
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NOTICE: BL2: DDR1600(rev.0.33)NOTICE: [COLD_BOOT]NOTICE: ..0
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NOTICE: BL2: DRAM Split is 4ch
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NOTICE: BL2: QoS is default setting(rev.0.37)
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NOTICE: BL2: Lossy Decomp areas
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NOTICE: Entry 0: DCMPAREACRAx:0x80000540 DCMPAREACRBx:0x570
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NOTICE: Entry 1: DCMPAREACRAx:0x40000000 DCMPAREACRBx:0x0
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NOTICE: Entry 2: DCMPAREACRAx:0x20000000 DCMPAREACRBx:0x0
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NOTICE: BL2: v2.0(release):v2.0-rc0-32-gbcda69a
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NOTICE: BL2: Built : 16:41:23, Oct 2 2018
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NOTICE: BL2: Normal boot
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INFO: BL2: Doing platform setup
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INFO: BL2: Loading image id 3
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NOTICE: BL2: dst=0xe6322000 src=0x8180000 len=512(0x200)
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NOTICE: BL2: dst=0x43f00000 src=0x8180400 len=6144(0x1800)
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WARNING: r-car ignoring the BL31 size from certificate,using
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RCAR_TRUSTED_SRAM_SIZE instead
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INFO: Loading image id=3 at address 0x44000000
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NOTICE: rcar_file_len: len: 0x0003e000
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NOTICE: BL2: dst=0x44000000 src=0x81c0000 len=253952(0x3e000)
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INFO: Image id=3 loaded: 0x44000000 - 0x4403e000
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INFO: BL2: Loading image id 4
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INFO: Loading image id=4 at address 0x44100000
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NOTICE: rcar_file_len: len: 0x00100000
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NOTICE: BL2: dst=0x44100000 src=0x8200000 len=1048576(0x100000)
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INFO: Image id=4 loaded: 0x44100000 - 0x44200000
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INFO: BL2: Loading image id 5
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INFO: Loading image id=5 at address 0x50000000
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NOTICE: rcar_file_len: len: 0x00100000
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NOTICE: BL2: dst=0x50000000 src=0x8640000 len=1048576(0x100000)
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INFO: Image id=5 loaded: 0x50000000 - 0x50100000
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NOTICE: BL2: Booting BL31
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INFO: Entry point address = 0x44000000
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INFO: SPSR = 0x3cd
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VERBOSE: Argument #0 = 0xe6325578
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VERBOSE: Argument #1 = 0x0
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VERBOSE: Argument #2 = 0x0
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VERBOSE: Argument #3 = 0x0
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VERBOSE: Argument #4 = 0x0
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VERBOSE: Argument #5 = 0x0
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VERBOSE: Argument #6 = 0x0
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VERBOSE: Argument #7 = 0x0
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U-Boot 2018.09-rc3-00028-g3711616 (Sep 27 2018 - 18:50:24 +0200)
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CPU: Renesas Electronics R8A7795 rev 1.1
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Model: Renesas Salvator-X board based on r8a7795 ES2.0+
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DRAM: 3.5 GiB
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Flash: 64 MiB
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MMC: sd@ee100000: 0, sd@ee140000: 1, sd@ee160000: 2
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Loading Environment from MMC... OK
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In: serial@e6e88000
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Out: serial@e6e88000
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Err: serial@e6e88000
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Net: eth0: ethernet@e6800000
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Hit any key to stop autoboot: 0
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=>
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