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355 lines
12 KiB
355 lines
12 KiB
/*
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* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PSCI_H
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#define PSCI_H
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#include <platform_def.h> /* for PLAT_NUM_PWR_DOMAINS */
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#include <common/bl_common.h>
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#include <lib/bakery_lock.h>
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#include <lib/psci/psci_lib.h> /* To maintain compatibility for SPDs */
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#include <lib/utils_def.h>
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/*******************************************************************************
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* Number of power domains whose state this PSCI implementation can track
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******************************************************************************/
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#ifdef PLAT_NUM_PWR_DOMAINS
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#define PSCI_NUM_PWR_DOMAINS PLAT_NUM_PWR_DOMAINS
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#else
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#define PSCI_NUM_PWR_DOMAINS (U(2) * PLATFORM_CORE_COUNT)
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#endif
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#define PSCI_NUM_NON_CPU_PWR_DOMAINS (PSCI_NUM_PWR_DOMAINS - \
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PLATFORM_CORE_COUNT)
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/* This is the power level corresponding to a CPU */
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#define PSCI_CPU_PWR_LVL U(0)
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/*
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* The maximum power level supported by PSCI. Since PSCI CPU_SUSPEND
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* uses the old power_state parameter format which has 2 bits to specify the
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* power level, this constant is defined to be 3.
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*/
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#define PSCI_MAX_PWR_LVL U(3)
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/*******************************************************************************
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* Defines for runtime services function ids
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******************************************************************************/
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#define PSCI_VERSION U(0x84000000)
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#define PSCI_CPU_SUSPEND_AARCH32 U(0x84000001)
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#define PSCI_CPU_SUSPEND_AARCH64 U(0xc4000001)
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#define PSCI_CPU_OFF U(0x84000002)
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#define PSCI_CPU_ON_AARCH32 U(0x84000003)
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#define PSCI_CPU_ON_AARCH64 U(0xc4000003)
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#define PSCI_AFFINITY_INFO_AARCH32 U(0x84000004)
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#define PSCI_AFFINITY_INFO_AARCH64 U(0xc4000004)
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#define PSCI_MIG_AARCH32 U(0x84000005)
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#define PSCI_MIG_AARCH64 U(0xc4000005)
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#define PSCI_MIG_INFO_TYPE U(0x84000006)
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#define PSCI_MIG_INFO_UP_CPU_AARCH32 U(0x84000007)
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#define PSCI_MIG_INFO_UP_CPU_AARCH64 U(0xc4000007)
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#define PSCI_SYSTEM_OFF U(0x84000008)
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#define PSCI_SYSTEM_RESET U(0x84000009)
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#define PSCI_FEATURES U(0x8400000A)
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#define PSCI_NODE_HW_STATE_AARCH32 U(0x8400000d)
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#define PSCI_NODE_HW_STATE_AARCH64 U(0xc400000d)
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#define PSCI_SYSTEM_SUSPEND_AARCH32 U(0x8400000E)
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#define PSCI_SYSTEM_SUSPEND_AARCH64 U(0xc400000E)
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#define PSCI_STAT_RESIDENCY_AARCH32 U(0x84000010)
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#define PSCI_STAT_RESIDENCY_AARCH64 U(0xc4000010)
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#define PSCI_STAT_COUNT_AARCH32 U(0x84000011)
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#define PSCI_STAT_COUNT_AARCH64 U(0xc4000011)
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#define PSCI_SYSTEM_RESET2_AARCH32 U(0x84000012)
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#define PSCI_SYSTEM_RESET2_AARCH64 U(0xc4000012)
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#define PSCI_MEM_PROTECT U(0x84000013)
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#define PSCI_MEM_CHK_RANGE_AARCH32 U(0x84000014)
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#define PSCI_MEM_CHK_RANGE_AARCH64 U(0xc4000014)
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/*
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* Number of PSCI calls (above) implemented
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*/
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#if ENABLE_PSCI_STAT
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#define PSCI_NUM_CALLS U(22)
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#else
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#define PSCI_NUM_CALLS U(18)
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#endif
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/* The macros below are used to identify PSCI calls from the SMC function ID */
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#define PSCI_FID_MASK U(0xffe0)
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#define PSCI_FID_VALUE U(0)
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#define is_psci_fid(_fid) \
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(((_fid) & PSCI_FID_MASK) == PSCI_FID_VALUE)
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/*******************************************************************************
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* PSCI Migrate and friends
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******************************************************************************/
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#define PSCI_TOS_UP_MIG_CAP 0
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#define PSCI_TOS_NOT_UP_MIG_CAP 1
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#define PSCI_TOS_NOT_PRESENT_MP 2
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/*******************************************************************************
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* PSCI CPU_SUSPEND 'power_state' parameter specific defines
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******************************************************************************/
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#define PSTATE_ID_SHIFT U(0)
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#if PSCI_EXTENDED_STATE_ID
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#define PSTATE_VALID_MASK U(0xB0000000)
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#define PSTATE_TYPE_SHIFT U(30)
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#define PSTATE_ID_MASK U(0xfffffff)
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#else
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#define PSTATE_VALID_MASK U(0xFCFE0000)
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#define PSTATE_TYPE_SHIFT U(16)
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#define PSTATE_PWR_LVL_SHIFT U(24)
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#define PSTATE_ID_MASK U(0xffff)
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#define PSTATE_PWR_LVL_MASK U(0x3)
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#define psci_get_pstate_pwrlvl(pstate) (((pstate) >> PSTATE_PWR_LVL_SHIFT) & \
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PSTATE_PWR_LVL_MASK)
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#define psci_make_powerstate(state_id, type, pwrlvl) \
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(((state_id) & PSTATE_ID_MASK) << PSTATE_ID_SHIFT) |\
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(((type) & PSTATE_TYPE_MASK) << PSTATE_TYPE_SHIFT) |\
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(((pwrlvl) & PSTATE_PWR_LVL_MASK) << PSTATE_PWR_LVL_SHIFT)
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#endif /* __PSCI_EXTENDED_STATE_ID__ */
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#define PSTATE_TYPE_STANDBY U(0x0)
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#define PSTATE_TYPE_POWERDOWN U(0x1)
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#define PSTATE_TYPE_MASK U(0x1)
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/*******************************************************************************
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* PSCI CPU_FEATURES feature flag specific defines
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******************************************************************************/
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/* Features flags for CPU SUSPEND power state parameter format. Bits [1:1] */
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#define FF_PSTATE_SHIFT U(1)
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#define FF_PSTATE_ORIG U(0)
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#define FF_PSTATE_EXTENDED U(1)
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#if PSCI_EXTENDED_STATE_ID
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#define FF_PSTATE FF_PSTATE_EXTENDED
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#else
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#define FF_PSTATE FF_PSTATE_ORIG
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#endif
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/* Features flags for CPU SUSPEND OS Initiated mode support. Bits [0:0] */
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#define FF_MODE_SUPPORT_SHIFT U(0)
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#define FF_SUPPORTS_OS_INIT_MODE U(1)
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/*******************************************************************************
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* PSCI version
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******************************************************************************/
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#define PSCI_MAJOR_VER (U(1) << 16)
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#define PSCI_MINOR_VER U(0x1)
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/*******************************************************************************
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* PSCI error codes
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******************************************************************************/
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#define PSCI_E_SUCCESS 0
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#define PSCI_E_NOT_SUPPORTED -1
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#define PSCI_E_INVALID_PARAMS -2
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#define PSCI_E_DENIED -3
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#define PSCI_E_ALREADY_ON -4
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#define PSCI_E_ON_PENDING -5
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#define PSCI_E_INTERN_FAIL -6
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#define PSCI_E_NOT_PRESENT -7
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#define PSCI_E_DISABLED -8
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#define PSCI_E_INVALID_ADDRESS -9
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#define PSCI_INVALID_MPIDR ~((u_register_t)0)
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/*
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* SYSTEM_RESET2 macros
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*/
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#define PSCI_RESET2_TYPE_VENDOR_SHIFT U(31)
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#define PSCI_RESET2_TYPE_VENDOR (U(1) << PSCI_RESET2_TYPE_VENDOR_SHIFT)
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#define PSCI_RESET2_TYPE_ARCH (U(0) << PSCI_RESET2_TYPE_VENDOR_SHIFT)
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#define PSCI_RESET2_SYSTEM_WARM_RESET (PSCI_RESET2_TYPE_ARCH | U(0))
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#ifndef __ASSEMBLER__
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#include <stdint.h>
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/* Function to help build the psci capabilities bitfield */
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static inline unsigned int define_psci_cap(unsigned int x)
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{
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return U(1) << (x & U(0x1f));
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}
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/* Power state helper functions */
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static inline unsigned int psci_get_pstate_id(unsigned int power_state)
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{
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return ((power_state) >> PSTATE_ID_SHIFT) & PSTATE_ID_MASK;
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}
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static inline unsigned int psci_get_pstate_type(unsigned int power_state)
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{
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return ((power_state) >> PSTATE_TYPE_SHIFT) & PSTATE_TYPE_MASK;
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}
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static inline unsigned int psci_check_power_state(unsigned int power_state)
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{
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return ((power_state) & PSTATE_VALID_MASK);
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}
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/*
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* These are the states reported by the PSCI_AFFINITY_INFO API for the specified
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* CPU. The definitions of these states can be found in Section 5.7.1 in the
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* PSCI specification (ARM DEN 0022C).
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*/
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typedef enum {
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AFF_STATE_ON = U(0),
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AFF_STATE_OFF = U(1),
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AFF_STATE_ON_PENDING = U(2)
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} aff_info_state_t;
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/*
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* These are the power states reported by PSCI_NODE_HW_STATE API for the
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* specified CPU. The definitions of these states can be found in Section 5.15.3
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* of PSCI specification (ARM DEN 0022C).
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*/
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#define HW_ON 0
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#define HW_OFF 1
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#define HW_STANDBY 2
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/*
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* Macro to represent invalid affinity level within PSCI.
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*/
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#define PSCI_INVALID_PWR_LVL (PLAT_MAX_PWR_LVL + U(1))
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/*
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* Type for representing the local power state at a particular level.
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*/
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typedef uint8_t plat_local_state_t;
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/* The local state macro used to represent RUN state. */
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#define PSCI_LOCAL_STATE_RUN U(0)
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/*
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* Function to test whether the plat_local_state is RUN state
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*/
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static inline int is_local_state_run(unsigned int plat_local_state)
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{
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return (plat_local_state == PSCI_LOCAL_STATE_RUN) ? 1 : 0;
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}
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/*
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* Function to test whether the plat_local_state is RETENTION state
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*/
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static inline int is_local_state_retn(unsigned int plat_local_state)
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{
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return ((plat_local_state > PSCI_LOCAL_STATE_RUN) &&
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(plat_local_state <= PLAT_MAX_RET_STATE)) ? 1 : 0;
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}
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/*
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* Function to test whether the plat_local_state is OFF state
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*/
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static inline int is_local_state_off(unsigned int plat_local_state)
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{
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return ((plat_local_state > PLAT_MAX_RET_STATE) &&
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(plat_local_state <= PLAT_MAX_OFF_STATE)) ? 1 : 0;
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}
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/*****************************************************************************
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* This data structure defines the representation of the power state parameter
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* for its exchange between the generic PSCI code and the platform port. For
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* example, it is used by the platform port to specify the requested power
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* states during a power management operation. It is used by the generic code to
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* inform the platform about the target power states that each level should
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* enter.
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****************************************************************************/
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typedef struct psci_power_state {
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/*
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* The pwr_domain_state[] stores the local power state at each level
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* for the CPU.
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*/
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plat_local_state_t pwr_domain_state[PLAT_MAX_PWR_LVL + U(1)];
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} psci_power_state_t;
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/*******************************************************************************
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* Structure used to store per-cpu information relevant to the PSCI service.
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* It is populated in the per-cpu data array. In return we get a guarantee that
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* this information will not reside on a cache line shared with another cpu.
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******************************************************************************/
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typedef struct psci_cpu_data {
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/* State as seen by PSCI Affinity Info API */
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aff_info_state_t aff_info_state;
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/*
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* Highest power level which takes part in a power management
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* operation.
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*/
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unsigned int target_pwrlvl;
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/* The local power state of this CPU */
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plat_local_state_t local_state;
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} psci_cpu_data_t;
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/*******************************************************************************
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* Structure populated by platform specific code to export routines which
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* perform common low level power management functions
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******************************************************************************/
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typedef struct plat_psci_ops {
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void (*cpu_standby)(plat_local_state_t cpu_state);
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int (*pwr_domain_on)(u_register_t mpidr);
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void (*pwr_domain_off)(const psci_power_state_t *target_state);
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void (*pwr_domain_suspend_pwrdown_early)(
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const psci_power_state_t *target_state);
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void (*pwr_domain_suspend)(const psci_power_state_t *target_state);
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void (*pwr_domain_on_finish)(const psci_power_state_t *target_state);
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void (*pwr_domain_on_finish_late)(
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const psci_power_state_t *target_state);
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void (*pwr_domain_suspend_finish)(
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const psci_power_state_t *target_state);
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void __dead2 (*pwr_domain_pwr_down_wfi)(
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const psci_power_state_t *target_state);
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void __dead2 (*system_off)(void);
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void __dead2 (*system_reset)(void);
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int (*validate_power_state)(unsigned int power_state,
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psci_power_state_t *req_state);
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int (*validate_ns_entrypoint)(uintptr_t ns_entrypoint);
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void (*get_sys_suspend_power_state)(
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psci_power_state_t *req_state);
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int (*get_pwr_lvl_state_idx)(plat_local_state_t pwr_domain_state,
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int pwrlvl);
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int (*translate_power_state_by_mpidr)(u_register_t mpidr,
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unsigned int power_state,
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psci_power_state_t *output_state);
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int (*get_node_hw_state)(u_register_t mpidr, unsigned int power_level);
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int (*mem_protect_chk)(uintptr_t base, u_register_t length);
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int (*read_mem_protect)(int *val);
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int (*write_mem_protect)(int val);
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int (*system_reset2)(int is_vendor,
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int reset_type, u_register_t cookie);
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} plat_psci_ops_t;
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/*******************************************************************************
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* Function & Data prototypes
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******************************************************************************/
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unsigned int psci_version(void);
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int psci_cpu_on(u_register_t target_cpu,
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uintptr_t entrypoint,
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u_register_t context_id);
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int psci_cpu_suspend(unsigned int power_state,
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uintptr_t entrypoint,
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u_register_t context_id);
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int psci_system_suspend(uintptr_t entrypoint, u_register_t context_id);
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int psci_cpu_off(void);
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int psci_affinity_info(u_register_t target_affinity,
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unsigned int lowest_affinity_level);
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int psci_migrate(u_register_t target_cpu);
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int psci_migrate_info_type(void);
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u_register_t psci_migrate_info_up_cpu(void);
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int psci_node_hw_state(u_register_t target_cpu,
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unsigned int power_level);
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int psci_features(unsigned int psci_fid);
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void __dead2 psci_power_down_wfi(void);
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void psci_arch_setup(void);
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#endif /*__ASSEMBLER__*/
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#endif /* PSCI_H */
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