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86 lines
1.9 KiB
86 lines
1.9 KiB
/*
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* Copyright (c) 2021-2022, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdbool.h>
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#include <common/debug.h>
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#include <lib/mpmm/mpmm.h>
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#include <plat/common/platform.h>
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#if ENABLE_MPMM_FCONF
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# include <lib/fconf/fconf.h>
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# include <lib/fconf/fconf_mpmm_getter.h>
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#endif
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static uint64_t read_cpuppmcr_el3_mpmmpinctl(void)
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{
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return (read_cpuppmcr_el3() >> CPUPPMCR_EL3_MPMMPINCTL_SHIFT) &
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CPUPPMCR_EL3_MPMMPINCTL_MASK;
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}
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static void write_cpumpmmcr_el3_mpmm_en(uint64_t mpmm_en)
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{
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uint64_t value = read_cpumpmmcr_el3();
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value &= ~(CPUMPMMCR_EL3_MPMM_EN_MASK << CPUMPMMCR_EL3_MPMM_EN_SHIFT);
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value |= (mpmm_en & CPUMPMMCR_EL3_MPMM_EN_MASK) <<
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CPUMPMMCR_EL3_MPMM_EN_SHIFT;
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write_cpumpmmcr_el3(value);
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}
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static bool mpmm_supported(void)
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{
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bool supported = false;
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const struct mpmm_topology *topology;
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#if ENABLE_MPMM_FCONF
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topology = FCONF_GET_PROPERTY(mpmm, config, topology);
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#else
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topology = plat_mpmm_topology();
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#endif /* ENABLE_MPMM_FCONF */
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/*
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* For the current core firstly try to find out if the platform
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* configuration has claimed support for MPMM, then make sure that MPMM
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* is controllable through the system registers.
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*/
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if (topology != NULL) {
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unsigned int core_pos = plat_my_core_pos();
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supported = topology->cores[core_pos].supported &&
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(read_cpuppmcr_el3_mpmmpinctl() == 0U);
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} else {
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ERROR("MPMM: failed to generate MPMM topology\n");
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}
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return supported;
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}
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/* Defaults to false */
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static bool mpmm_disable_for_errata;
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void mpmm_enable(void)
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{
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if (mpmm_supported()) {
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if (mpmm_disable_for_errata) {
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WARN("MPMM: disabled by errata workaround\n");
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return;
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}
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write_cpumpmmcr_el3_mpmm_en(1U);
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}
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}
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/*
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* This function is called from assembly code very early in BL31 so it must be
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* small and simple.
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*/
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void mpmm_errata_disable(void)
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{
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mpmm_disable_for_errata = true;
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}
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