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222 lines
7.7 KiB
222 lines
7.7 KiB
/*
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* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch.h>
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#include <arch_helpers.h>
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#include <assert.h>
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#include <auth_mod.h>
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#include <bl_common.h>
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#include <debug.h>
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#include <platform.h>
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#include <platform_def.h>
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#include "bl1_private.h"
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/*******************************************************************************
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* Runs BL2 from the given entry point. It results in dropping the
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* exception level
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******************************************************************************/
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static void __dead2 bl1_run_bl2(entry_point_info_t *bl2_ep)
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{
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bl1_arch_next_el_setup();
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/* Tell next EL what we want done */
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bl2_ep->args.arg0 = RUN_IMAGE;
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if (GET_SECURITY_STATE(bl2_ep->h.attr) == NON_SECURE)
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change_security_state(GET_SECURITY_STATE(bl2_ep->h.attr));
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write_spsr_el3(bl2_ep->spsr);
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write_elr_el3(bl2_ep->pc);
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eret(bl2_ep->args.arg0,
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bl2_ep->args.arg1,
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bl2_ep->args.arg2,
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bl2_ep->args.arg3,
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bl2_ep->args.arg4,
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bl2_ep->args.arg5,
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bl2_ep->args.arg6,
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bl2_ep->args.arg7);
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}
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/*******************************************************************************
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* The next function has a weak definition. Platform specific code can override
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* it if it wishes to.
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******************************************************************************/
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#pragma weak bl1_init_bl2_mem_layout
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/*******************************************************************************
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* Function that takes a memory layout into which BL2 has been loaded and
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* populates a new memory layout for BL2 that ensures that BL1's data sections
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* resident in secure RAM are not visible to BL2.
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******************************************************************************/
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void bl1_init_bl2_mem_layout(const meminfo_t *bl1_mem_layout,
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meminfo_t *bl2_mem_layout)
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{
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const size_t bl1_size = BL1_RAM_LIMIT - BL1_RAM_BASE;
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assert(bl1_mem_layout != NULL);
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assert(bl2_mem_layout != NULL);
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/* Check that BL1's memory is lying outside of the free memory */
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assert((BL1_RAM_LIMIT <= bl1_mem_layout->free_base) ||
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(BL1_RAM_BASE >= bl1_mem_layout->free_base + bl1_mem_layout->free_size));
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/* Remove BL1 RW data from the scope of memory visible to BL2 */
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*bl2_mem_layout = *bl1_mem_layout;
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reserve_mem(&bl2_mem_layout->total_base,
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&bl2_mem_layout->total_size,
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BL1_RAM_BASE,
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bl1_size);
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flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t));
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}
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/*******************************************************************************
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* Function to perform late architectural and platform specific initialization.
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* It also locates and loads the BL2 raw binary image in the trusted DRAM. Only
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* called by the primary cpu after a cold boot.
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* TODO: Add support for alternative image load mechanism e.g using virtio/elf
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* loader etc.
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******************************************************************************/
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void bl1_main(void)
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{
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/* Announce our arrival */
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NOTICE(FIRMWARE_WELCOME_STR);
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NOTICE("BL1: %s\n", version_string);
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NOTICE("BL1: %s\n", build_message);
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INFO("BL1: RAM 0x%lx - 0x%lx\n", BL1_RAM_BASE, BL1_RAM_LIMIT);
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image_info_t bl2_image_info = { {0} };
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entry_point_info_t bl2_ep = { {0} };
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meminfo_t *bl1_tzram_layout;
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meminfo_t *bl2_tzram_layout = 0x0;
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int err;
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#if DEBUG
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unsigned long val;
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/*
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* Ensure that MMU/Caches and coherency are turned on
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*/
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val = read_sctlr_el3();
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assert(val & SCTLR_M_BIT);
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assert(val & SCTLR_C_BIT);
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assert(val & SCTLR_I_BIT);
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/*
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* Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the
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* provided platform value
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*/
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val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK;
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/*
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* If CWG is zero, then no CWG information is available but we can
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* at least check the platform value is less than the architectural
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* maximum.
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*/
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if (val != 0)
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assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val));
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else
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assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE);
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#endif
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/* Perform remaining generic architectural setup from EL3 */
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bl1_arch_setup();
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/* Perform platform setup in BL1. */
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bl1_platform_setup();
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SET_PARAM_HEAD(&bl2_image_info, PARAM_IMAGE_BINARY, VERSION_1, 0);
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SET_PARAM_HEAD(&bl2_ep, PARAM_EP, VERSION_1, 0);
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/* Find out how much free trusted ram remains after BL1 load */
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bl1_tzram_layout = bl1_plat_sec_mem_layout();
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INFO("BL1: Loading BL2\n");
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#if TRUSTED_BOARD_BOOT
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/* Initialize authentication module */
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auth_mod_init();
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#endif /* TRUSTED_BOARD_BOOT */
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/* Load the BL2 image */
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err = load_auth_image(bl1_tzram_layout,
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BL2_IMAGE_ID,
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BL2_BASE,
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&bl2_image_info,
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&bl2_ep);
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if (err) {
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/*
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* TODO: print failure to load BL2 but also add a tzwdog timer
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* which will reset the system eventually.
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*/
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ERROR("Failed to load BL2 firmware.\n");
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panic();
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}
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/*
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* Create a new layout of memory for BL2 as seen by BL1 i.e.
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* tell it the amount of total and free memory available.
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* This layout is created at the first free address visible
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* to BL2. BL2 will read the memory layout before using its
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* memory for other purposes.
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*/
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bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->free_base;
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bl1_init_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout);
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bl1_plat_set_bl2_ep_info(&bl2_image_info, &bl2_ep);
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bl2_ep.args.arg1 = (unsigned long)bl2_tzram_layout;
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NOTICE("BL1: Booting BL2\n");
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INFO("BL1: BL2 address = 0x%llx\n",
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(unsigned long long) bl2_ep.pc);
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INFO("BL1: BL2 spsr = 0x%x\n", bl2_ep.spsr);
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VERBOSE("BL1: BL2 memory layout address = 0x%llx\n",
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(unsigned long long) bl2_tzram_layout);
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bl1_run_bl2(&bl2_ep);
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return;
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}
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/*******************************************************************************
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* Temporary function to print the fact that BL2 has done its job and BL31 is
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* about to be loaded. This is needed as long as printfs cannot be used
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******************************************************************************/
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void display_boot_progress(entry_point_info_t *bl31_ep_info)
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{
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NOTICE("BL1: Booting BL3-1\n");
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INFO("BL1: BL3-1 address = 0x%llx\n",
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(unsigned long long)bl31_ep_info->pc);
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INFO("BL1: BL3-1 spsr = 0x%llx\n",
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(unsigned long long)bl31_ep_info->spsr);
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INFO("BL1: BL3-1 params address = 0x%llx\n",
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(unsigned long long)bl31_ep_info->args.arg0);
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INFO("BL1: BL3-1 plat params address = 0x%llx\n",
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(unsigned long long)bl31_ep_info->args.arg1);
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}
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