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361 lines
7.7 KiB
361 lines
7.7 KiB
/*
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* Copyright (c) 2023, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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/*
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* Morello TRMs specify the size for these coresight components as 64K.
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* The actual size is just 4K though 64K is reserved. Access to the
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* unmapped reserved region results in a DECERR response.
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*/
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cpu_debug0: cpu-debug@402010000 {
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compatible = "arm,coresight-cpu-debug", "arm,primecell";
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cpu = <&cpu0>;
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reg = <0x4 0x02010000 0x0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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};
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etm0: etm@402040000 {
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compatible = "arm,coresight-etm4x", "arm,primecell";
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cpu = <&cpu0>;
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reg = <0x4 0x02040000 0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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cluster0_etm0_out_port: endpoint {
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remote-endpoint = <&cluster0_static_funnel_in_port0>;
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};
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};
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};
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};
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cpu_debug1: cpu-debug@402110000 {
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compatible = "arm,coresight-cpu-debug", "arm,primecell";
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cpu = <&cpu1>;
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reg = <0x4 0x02110000 0x0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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};
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etm1: etm@402140000 {
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compatible = "arm,coresight-etm4x", "arm,primecell";
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cpu = <&cpu1>;
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reg = <0x4 0x02140000 0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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cluster0_etm1_out_port: endpoint {
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remote-endpoint = <&cluster0_static_funnel_in_port1>;
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};
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};
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};
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};
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cpu_debug2: cpu-debug@403010000 {
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compatible = "arm,coresight-cpu-debug", "arm,primecell";
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cpu = <&cpu2>;
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reg = <0x4 0x03010000 0x0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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};
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etm2: etm@403040000 {
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compatible = "arm,coresight-etm4x", "arm,primecell";
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cpu = <&cpu2>;
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reg = <0x4 0x03040000 0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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cluster1_etm0_out_port: endpoint {
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remote-endpoint = <&cluster1_static_funnel_in_port0>;
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};
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};
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};
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};
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cpu_debug3: cpu-debug@403110000 {
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compatible = "arm,coresight-cpu-debug", "arm,primecell";
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cpu = <&cpu3>;
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reg = <0x4 0x03110000 0x0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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};
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etm3: etm@403140000 {
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compatible = "arm,coresight-etm4x", "arm,primecell";
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cpu = <&cpu3>;
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reg = <0x4 0x03140000 0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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cluster1_etm1_out_port: endpoint {
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remote-endpoint = <&cluster1_static_funnel_in_port1>;
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};
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};
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};
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};
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sfunnel0: funnel@0 { /* cluster0 funnel */
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compatible = "arm,coresight-static-funnel";
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out-ports {
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port {
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cluster0_static_funnel_out_port: endpoint {
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remote-endpoint = <&etf0_in_port>;
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};
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};
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};
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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cluster0_static_funnel_in_port0: endpoint {
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remote-endpoint = <&cluster0_etm0_out_port>;
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};
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};
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port@1 {
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reg = <1>;
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cluster0_static_funnel_in_port1: endpoint {
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remote-endpoint = <&cluster0_etm1_out_port>;
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};
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};
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};
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};
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sfunnel1: funnel@1 { /* cluster1 funnel */
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compatible = "arm,coresight-static-funnel";
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out-ports {
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port {
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cluster1_static_funnel_out_port: endpoint {
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remote-endpoint = <&etf1_in_port>;
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};
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};
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};
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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cluster1_static_funnel_in_port0: endpoint {
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remote-endpoint = <&cluster1_etm0_out_port>;
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};
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};
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port@1 {
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reg = <1>;
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cluster1_static_funnel_in_port1: endpoint {
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remote-endpoint = <&cluster1_etm1_out_port>;
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};
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};
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};
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};
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tpiu@400130000 {
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compatible = "arm,coresight-tpiu", "arm,primecell";
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reg = <0x4 0x00130000 0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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in-ports {
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port {
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tpiu_in_port: endpoint {
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remote-endpoint = <&replicator_out_port0>;
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};
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};
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};
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};
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main_funnel: funnel@4000a0000 {
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compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
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reg = <0x4 0x000a0000 0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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main_funnel_out_port: endpoint {
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remote-endpoint = <&replicator_in_port>;
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};
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};
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};
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main_funnel_in_ports: in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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main_funnel_in_port0: endpoint {
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remote-endpoint = <&cluster_funnel_out_port>;
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};
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};
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port@5 {
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reg = <5>;
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main_funnel_in_port5: endpoint {
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remote-endpoint = <&etf2_out_port>;
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};
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};
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};
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};
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etr@400120000 {
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compatible = "arm,coresight-tmc", "arm,primecell";
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reg = <0x4 0x00120000 0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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arm,scatter-gather;
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interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "etrbufint";
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in-ports {
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port {
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etr_in_port: endpoint {
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remote-endpoint = <&replicator_out_port1>;
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};
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};
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};
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};
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replicator@400110000 {
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compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
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reg = <0x4 0x00110000 0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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out-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* replicator output ports */
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port@0 {
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reg = <0>;
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replicator_out_port0: endpoint {
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remote-endpoint = <&tpiu_in_port>;
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};
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};
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port@1 {
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reg = <1>;
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replicator_out_port1: endpoint {
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remote-endpoint = <&etr_in_port>;
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};
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};
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};
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in-ports {
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port {
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replicator_in_port: endpoint {
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remote-endpoint = <&main_funnel_out_port>;
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};
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};
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};
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};
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cluster_funnel: funnel@4000b0000 {
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compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
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reg = <0x4 0x000b0000 0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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cluster_funnel_out_port: endpoint {
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remote-endpoint = <&main_funnel_in_port0>;
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};
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};
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};
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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cluster_funnel_in_port0: endpoint {
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remote-endpoint = <&etf0_out_port>;
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};
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};
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port@1 {
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reg = <1>;
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cluster_funnel_in_port1: endpoint {
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remote-endpoint = <&etf1_out_port>;
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};
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};
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};
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};
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etf0: etf@400410000 {
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compatible = "arm,coresight-tmc", "arm,primecell";
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reg = <0x4 0x00410000 0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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in-ports {
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port {
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etf0_in_port: endpoint {
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remote-endpoint = <&cluster0_static_funnel_out_port>;
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};
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};
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};
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out-ports {
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port {
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etf0_out_port: endpoint {
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remote-endpoint = <&cluster_funnel_in_port0>;
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};
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};
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};
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};
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etf1: etf@400420000 {
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compatible = "arm,coresight-tmc", "arm,primecell";
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reg = <0x4 0x00420000 0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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in-ports {
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port {
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etf1_in_port: endpoint {
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remote-endpoint = <&cluster1_static_funnel_out_port>;
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};
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};
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};
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out-ports {
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port {
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etf1_out_port: endpoint {
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remote-endpoint = <&cluster_funnel_in_port1>;
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};
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};
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};
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};
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stm_etf: etf@400010000 {
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compatible = "arm,coresight-tmc", "arm,primecell";
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reg = <0x4 0x00010000 0 0x1000>;
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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in-ports {
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port {
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etf2_in_port: endpoint {
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remote-endpoint = <&stm_out_port>;
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};
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};
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};
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out-ports {
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port {
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etf2_out_port: endpoint {
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remote-endpoint = <&main_funnel_in_port5>;
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};
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};
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};
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};
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stm@400800000 {
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compatible = "arm,coresight-stm", "arm,primecell";
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reg = <4 0x00800000 0 0x1000>,
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<0 0x4d000000 0 0x1000000>;
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reg-names = "stm-base", "stm-stimulus-base";
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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stm_out_port: endpoint {
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remote-endpoint = <&etf2_in_port>;
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};
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};
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};
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};
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};
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