arm-trusted-firmware

History

levi.yun 7475815f4b feat(handoff): fix register convention r1/x1 value on transfer list According to recently firmware handsoff spec [1]'s "Register usage at handoff boundary", Transfer List's signature value was changed from 0x40_b10b (3 bytes) to 4a0f_b10b (4 bytes). As updating of TL's signature, register value of x1/r1 should be: In aarch32's r1 value should be R1[23:0]: set to the TL signature (4a0f_b10b -> masked range value: 0f_b10b) R1[31:24]: version of the register convention == 1 and In aarch64's x1 value should be X1[31:0]: set to the TL signature (4a0f_b10b) X1[39:32]: version of the register convention == 1 X1[63:40]: MBZ (See the [2] and [3]). Therefore, it requires to separate mask and shift value for register convention version field when sets each r1/x1. This patch fix two problems: 1. breaking X1 value with updated specification in aarch64 - change of length of signature field. 2. previous error value set in R1 in arm32. - length of signature should be 24, but it uses 32bit signature. This change is breaking change. It requires some patch for other softwares (u-boot[4], optee[5]). Link: https://github.com/FirmwareHandoff/firmware_handoff [1] Link: https://github.com/FirmwareHandoff/firmware_handoff/issues/32 [2] Link: `5aa7aa1d3a` [3] Link: https://lists.denx.de/pipermail/u-boot/2024-July/558628.html [4] Link: https://github.com/OP-TEE/optee_os/pull/6933 [5] Signed-off-by: Levi Yun <yeoreum.yun@arm.com> Change-Id: Ie417e054a7a4c192024a2679419e99efeded1705		6 months ago
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allwinner	fix(allwinner): remove unneeded header inclusion	5 months ago
amd/versal2	feat(versal2): add support for AMD Versal Gen 2 platform	5 months ago
amlogic	build: unify verbosity handling	5 months ago
arm	feat(tc): provide target_locality info of AP FW components	4 months ago
aspeed/ast2700	feat(ast2700): set up CPU clock frequency by SCU	4 months ago
brcm	refactor(console): consolidate console runtime switch	6 months ago
common	feat(bl): add plat handler for image loading	5 months ago
hisilicon	build: unify verbosity handling	5 months ago
imx	build: unify verbosity handling	5 months ago
intel/soc	refactor: fix common misspelling of init*	8 months ago
marvell	build: unify verbosity handling	5 months ago
mediatek	feat(mediatek): configure DEV_IRQ as G1S interrupt	5 months ago
nuvoton	fix(nuvoton): prevent changing clock frequency	8 months ago
nvidia/tegra	refactor(console): consolidate console runtime switch	6 months ago
nxp	feat(s32g274a): enable BL2 early clocks	4 months ago
qemu	feat(handoff): fix register convention r1/x1 value on transfer list	4 months ago
qti	chore: remove MULTI_CONSOLE_API references	1 year ago
renesas	build: unify verbosity handling	5 months ago
rockchip	Merge changes from topic "rockchip" into integration	5 months ago
rpi	build: unify verbosity handling	5 months ago
socionext	build: unify verbosity handling	5 months ago
st	refactor(st): change method to get GIC base addresses	5 months ago
ti/k3	Revert "fix(ti): do not take system power reference in bl31_platform_setup()"	9 months ago
xilinx	feat(zynqmp): enable ENABLE_LTO flag	4 months ago