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Jit Loon Lim 7931d3322d feat(intel): platform enablement for Agilex5 SoC FPGA 2 years ago
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include feat(intel): platform enablement for Agilex5 SoC FPGA 1 year ago
soc fix(intel): fix Agilex and N5X clock manager to main PLL C0 2 years ago
bl2_plat_setup.c feat(intel): support version 2 SiP SVC SMC function ID for non-mailbox commands 3 years ago
bl31_plat_setup.c fix(tree): correct some typos 2 years ago
platform.mk refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3 2 years ago