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139 lines
3.2 KiB
139 lines
3.2 KiB
/*
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* Copyright (c) 2022-2023, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <string.h>
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include <smccc_helpers.h>
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#include <emi_mpu.h>
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#include <lib/mtk_init/mtk_init.h>
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#include <mtk_sip_svc.h>
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#if ENABLE_EMI_MPU_SW_LOCK
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static unsigned char region_lock_state[EMI_MPU_REGION_NUM];
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#endif
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#define EMI_MPU_START_MASK (0x00FFFFFF)
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#define EMI_MPU_END_MASK (0x00FFFFFF)
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#define EMI_MPU_APC_SW_LOCK_MASK (0x00FFFFFF)
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#define EMI_MPU_APC_HW_LOCK_MASK (0x80FFFFFF)
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static int _emi_mpu_set_protection(unsigned int start, unsigned int end,
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unsigned int apc)
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{
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unsigned int dgroup;
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unsigned int region;
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region = (start >> 24) & 0xFF;
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start &= EMI_MPU_START_MASK;
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dgroup = (end >> 24) & 0xFF;
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end &= EMI_MPU_END_MASK;
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if ((region >= EMI_MPU_REGION_NUM) || (dgroup > EMI_MPU_DGROUP_NUM)) {
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WARN("invalid region, domain\n");
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return -1;
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}
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#if ENABLE_EMI_MPU_SW_LOCK
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if (region_lock_state[region] == 1) {
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WARN("invalid region\n");
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return -1;
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}
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if ((dgroup == 0) && ((apc >> 31) & 0x1)) {
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region_lock_state[region] = 1;
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}
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apc &= EMI_MPU_APC_SW_LOCK_MASK;
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#else
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apc &= EMI_MPU_APC_HW_LOCK_MASK;
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#endif
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if ((start >= DRAM_OFFSET) && (end >= start)) {
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start -= DRAM_OFFSET;
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end -= DRAM_OFFSET;
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} else {
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WARN("invalid range\n");
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return -1;
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}
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mmio_write_32(EMI_MPU_SA(region), start);
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mmio_write_32(EMI_MPU_EA(region), end);
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mmio_write_32(EMI_MPU_APC(region, dgroup), apc);
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#if defined(SUB_EMI_MPU_BASE)
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mmio_write_32(SUB_EMI_MPU_SA(region), start);
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mmio_write_32(SUB_EMI_MPU_EA(region), end);
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mmio_write_32(SUB_EMI_MPU_APC(region, dgroup), apc);
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#endif
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return 0;
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}
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static void dump_emi_mpu_regions(void)
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{
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int region, i;
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/* Only dump 8 regions(max: EMI_MPU_REGION_NUM --> 32) */
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for (region = 0; region < 8; ++region) {
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INFO("region %d:\n", region);
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INFO("\tsa: 0x%x, ea: 0x%x\n",
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mmio_read_32(EMI_MPU_SA(region)), mmio_read_32(EMI_MPU_EA(region)));
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for (i = 0; i < EMI_MPU_DGROUP_NUM; ++i) {
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INFO("\tapc%d: 0x%x\n", i, mmio_read_32(EMI_MPU_APC(region, i)));
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}
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}
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}
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int emi_mpu_set_protection(struct emi_region_info_t *region_info)
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{
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unsigned int start, end;
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int i;
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if (region_info->region >= EMI_MPU_REGION_NUM) {
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WARN("invalid region\n");
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return -1;
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}
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start = (unsigned int)(region_info->start >> EMI_MPU_ALIGN_BITS) |
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(region_info->region << 24);
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for (i = EMI_MPU_DGROUP_NUM - 1; i >= 0; i--) {
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end = (unsigned int)(region_info->end >> EMI_MPU_ALIGN_BITS) | (i << 24);
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if (_emi_mpu_set_protection(start, end, region_info->apc[i]) < 0) {
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WARN("Failed to set emi mpu protection(%d, %d, %d)\n",
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start, end, region_info->apc[i]);
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}
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}
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return 0;
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}
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u_register_t mtk_emi_mpu_sip_handler(u_register_t x1, u_register_t x2,
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u_register_t x3, u_register_t x4,
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void *handle, struct smccc_res *smccc_ret)
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{
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int ret;
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ret = emi_mpu_optee_handler(x1, x2, x3);
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SMC_RET2(handle, ret, 0U);
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return 0;
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}
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DECLARE_SMC_HANDLER(MTK_SIP_TEE_MPU_PERM_SET, mtk_emi_mpu_sip_handler);
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int emi_mpu_init(void)
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{
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INFO("[%s] emi mpu initialization\n", __func__);
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set_emi_mpu_regions();
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dump_emi_mpu_regions();
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return 0;
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}
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MTK_PLAT_SETUP_0_INIT(emi_mpu_init);
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