arm-trusted-firmware

History

Jeenu Viswambharan ca6d918582 RAS: Allow individual interrupt registration EHF currently allows for registering interrupt handlers for a defined priority ranges. This is primarily targeted at various EL3 dispatchers to own ranges of secure interrupt priorities in order to delegate execution to lower ELs. The RAS support added by earlier patches necessitates registering handlers based on interrupt number so that error handling agents shall receive and handle specific Error Recovery or Fault Handling interrupts at EL3. This patch introduces a macro, RAS_INTERRUPTS() to declare an array of interrupt numbers and handlers. Error handling agents can use this macro to register handlers for individual RAS interrupts. The array is expected to be sorted in the increasing order of interrupt numbers. As part of RAS initialisation, the list of all RAS interrupts are sorted based on their ID so that, given an interrupt, its handler can be looked up with a simple binary search. For an error handling agent that wants to handle a RAS interrupt, platform must: - Define PLAT_RAS_PRI to be the priority of all RAS exceptions. - Enumerate interrupts to have the GIC driver program individual EL3 interrupts to the required priority range. This is required by EHF even before this patch. Documentation to follow. Change-Id: I9471e4887ff541f8a7a63309e9cd8f771f76aeda Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>		7 years ago
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amu.h	AMU: Implement context save/restore for aarch32	7 years ago
amu_private.h	AMU: Add configuration helpers for aarch64	7 years ago
ras.h	RAS: Allow individual interrupt registration	7 years ago
ras_arch.h	RAS: Add helpers to access Standard Error Records	7 years ago
spe.h	Implement {spe,sve}_supported() helpers and refactor code	7 years ago
sve.h	Implement {spe,sve}_supported() helpers and refactor code	7 years ago