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78 lines
2.0 KiB
78 lines
2.0 KiB
/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PLAT_MACROS_S
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#define PLAT_MACROS_S
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#include <drivers/arm/cci.h>
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#include <drivers/arm/gicv2.h>
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#include <hi3660.h>
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#include <platform_def.h>
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.section .rodata.gic_reg_name, "aS"
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gicc_regs:
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.asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", ""
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gicd_pend_reg:
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.asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n"
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newline:
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.asciz "\n"
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spacer:
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.asciz ":\t\t0x"
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.section .rodata.cci_reg_name, "aS"
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cci_iface_regs:
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.asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
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/* ---------------------------------------------
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* The below macro prints out relevant GIC
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* registers whenever an unhandled exception is
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* taken in BL31.
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* ---------------------------------------------
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*/
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.macro plat_crash_print_regs
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mov_imm x16, GICD_REG_BASE
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mov_imm x17, GICC_REG_BASE
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/* Load the gicc reg list to x6 */
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adr x6, gicc_regs
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/* Load the gicc regs to gp regs used by str_in_crash_buf_print */
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ldr w8, [x17, #GICC_HPPIR]
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ldr w9, [x17, #GICC_AHPPIR]
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ldr w10, [x17, #GICC_CTLR]
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/* Store to the crash buf and print to cosole */
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bl str_in_crash_buf_print
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/* Print the GICD_ISPENDR regs */
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add x7, x16, #GICD_ISPENDR
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adr x4, gicd_pend_reg
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bl asm_print_str
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2:
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sub x4, x7, x16
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cmp x4, #0x280
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b.eq 1f
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bl asm_print_hex
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adr x4, spacer
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bl asm_print_str
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ldr x4, [x7], #8
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bl asm_print_hex
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adr x4, newline
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bl asm_print_str
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b 2b
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1:
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adr x6, cci_iface_regs
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/* Store in x7 the base address of the first interface */
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mov_imm x7, (CCI400_REG_BASE + SLAVE_IFACE_OFFSET( \
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CCI400_SL_IFACE3_CLUSTER_IX))
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ldr w8, [x7, #SNOOP_CTRL_REG]
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/* Store in x7 the base address of the second interface */
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mov_imm x7, (CCI400_REG_BASE + SLAVE_IFACE_OFFSET( \
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CCI400_SL_IFACE4_CLUSTER_IX))
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ldr w9, [x7, #SNOOP_CTRL_REG]
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/* Store to the crash buf and print to console */
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bl str_in_crash_buf_print
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.endm
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#endif /* PLAT_MACROS_S */
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