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117 lines
3.9 KiB
117 lines
3.9 KiB
/*
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* Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <arch_helpers.h>
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#include <common/bl_common.h>
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#include <common/desc_image_load.h>
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#include <plat/common/common_def.h>
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#include <drivers/console.h>
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#include <common/debug.h>
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#include <drivers/generic_delay_timer.h>
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#include <mcucfg.h>
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#include <mt_gic_v3.h>
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#include <lib/mmio.h>
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#include <mtk_plat_common.h>
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#include <plat_debug.h>
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#include <plat_private.h>
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#include <platform_def.h>
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#include <scu.h>
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#include <drivers/ti/uart/uart_16550.h>
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static entry_point_info_t bl32_ep_info;
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static entry_point_info_t bl33_ep_info;
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static void platform_setup_cpu(void)
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{
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mmio_write_32((uintptr_t)&mt8183_mcucfg->mp0_rw_rsvd0, 0x00000001);
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VERBOSE("addr of cci_adb400_dcm_config: 0x%x\n",
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mmio_read_32((uintptr_t)&mt8183_mcucfg->cci_adb400_dcm_config));
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VERBOSE("addr of sync_dcm_config: 0x%x\n",
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mmio_read_32((uintptr_t)&mt8183_mcucfg->sync_dcm_config));
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VERBOSE("mp0_spmc: 0x%x\n",
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mmio_read_32((uintptr_t)&mt8183_mcucfg->mp0_cputop_spmc_ctl));
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VERBOSE("mp1_spmc: 0x%x\n",
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mmio_read_32((uintptr_t)&mt8183_mcucfg->mp1_cputop_spmc_ctl));
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}
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/*******************************************************************************
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* Return a pointer to the 'entry_point_info' structure of the next image for
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* the security state specified. BL33 corresponds to the non-secure image type
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* while BL32 corresponds to the secure image type. A NULL pointer is returned
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* if the image does not exist.
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******************************************************************************/
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entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
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{
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entry_point_info_t *next_image_info;
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next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
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assert(next_image_info->h.type == PARAM_EP);
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/* None of the images on this platform can have 0x0 as the entrypoint */
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if (next_image_info->pc)
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return next_image_info;
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else
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return NULL;
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}
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/*******************************************************************************
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* Perform any BL31 early platform setup. Here is an opportunity to copy
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* parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they
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* are lost (potentially). This needs to be done before the MMU is initialized
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* so that the memory layout can be used while creating page tables.
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* BL2 has flushed this information to memory, so we are guaranteed to pick up
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* good data.
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******************************************************************************/
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void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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u_register_t arg2, u_register_t arg3)
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{
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static console_16550_t console;
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console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console);
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NOTICE("MT8183 bl31_setup\n");
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bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info);
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}
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/*******************************************************************************
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* Perform any BL31 platform setup code
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******************************************************************************/
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void bl31_platform_setup(void)
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{
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platform_setup_cpu();
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generic_delay_timer_init();
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/* Initialize the GIC driver, CPU and distributor interfaces */
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mt_gic_driver_init();
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mt_gic_init();
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/* Init mcsi SF */
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plat_mtk_cci_init_sf();
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}
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/*******************************************************************************
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* Perform the very early platform specific architectural setup here. At the
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* moment this is only intializes the mmu in a quick and dirty way.
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******************************************************************************/
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void bl31_plat_arch_setup(void)
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{
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plat_mtk_cci_init();
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plat_mtk_cci_enable();
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enable_scu(read_mpidr());
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plat_configure_mmu_el3(BL_CODE_BASE,
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BL_COHERENT_RAM_END - BL_CODE_BASE,
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BL_CODE_BASE,
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BL_CODE_END,
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BL_COHERENT_RAM_BASE,
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BL_COHERENT_RAM_END);
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}
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