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127 lines
4.0 KiB
127 lines
4.0 KiB
/*
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* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef COMMON_DEF_H
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#define COMMON_DEF_H
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#include <common/bl_common.h>
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#include <lib/utils_def.h>
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#include <lib/xlat_tables/xlat_tables_defs.h>
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#include <platform_def.h>
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#define SZ_32 U(0x00000020)
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#define SZ_64 U(0x00000040)
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#define SZ_128 U(0x00000080)
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#define SZ_256 U(0x00000100)
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#define SZ_512 U(0x00000200)
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#define SZ_1K U(0x00000400)
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#define SZ_2K U(0x00000800)
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#define SZ_4K U(0x00001000)
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#define SZ_8K U(0x00002000)
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#define SZ_16K U(0x00004000)
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#define SZ_32K U(0x00008000)
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#define SZ_64K U(0x00010000)
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#define SZ_128K U(0x00020000)
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#define SZ_256K U(0x00040000)
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#define SZ_512K U(0x00080000)
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#define SZ_1M U(0x00100000)
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#define SZ_2M U(0x00200000)
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#define SZ_4M U(0x00400000)
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#define SZ_8M U(0x00800000)
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#define SZ_16M U(0x01000000)
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#define SZ_32M U(0x02000000)
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#define SZ_64M U(0x04000000)
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#define SZ_128M U(0x08000000)
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#define SZ_256M U(0x10000000)
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#define SZ_512M U(0x20000000)
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#define SZ_1G U(0x40000000)
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#define SZ_2G U(0x80000000)
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/******************************************************************************
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* Required platform porting definitions that are expected to be common to
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* all platforms
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*****************************************************************************/
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/*
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* Platform binary types for linking
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*/
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#ifdef __aarch64__
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#define PLATFORM_LINKER_FORMAT "elf64-littleaarch64"
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#define PLATFORM_LINKER_ARCH aarch64
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#else
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#define PLATFORM_LINKER_FORMAT "elf32-littlearm"
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#define PLATFORM_LINKER_ARCH arm
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#endif /* __aarch64__ */
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/*
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* Generic platform constants
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*/
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#define FIRMWARE_WELCOME_STR "Booting Trusted Firmware\n"
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#define BL2_IMAGE_DESC { \
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.image_id = BL2_IMAGE_ID, \
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SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, \
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VERSION_2, image_info_t, 0), \
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.image_info.image_base = BL2_BASE, \
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.image_info.image_max_size = BL2_LIMIT - BL2_BASE,\
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SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, \
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VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),\
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.ep_info.pc = BL2_BASE, \
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}
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/*
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* The following constants identify the extents of the code & read-only data
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* regions. These addresses are used by the MMU setup code and therefore they
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* must be page-aligned.
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*
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* When the code and read-only data are mapped as a single atomic section
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* (i.e. when SEPARATE_CODE_AND_RODATA=0) then we treat the whole section as
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* code by specifying the read-only data section as empty.
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*
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* BL1 is different than the other images in the sense that its read-write data
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* originally lives in Trusted ROM and needs to be relocated in Trusted SRAM at
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* run-time. Therefore, the read-write data in ROM can be mapped with the same
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* memory attributes as the read-only data region. For this reason, BL1 uses
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* different macros.
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*
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* Note that BL1_ROM_END is not necessarily aligned on a page boundary as it
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* just points to the end of BL1's actual content in Trusted ROM. Therefore it
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* needs to be rounded up to the next page size in order to map the whole last
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* page of it with the right memory attributes.
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*/
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#if SEPARATE_CODE_AND_RODATA
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#define BL1_CODE_END BL_CODE_END
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#define BL1_RO_DATA_BASE BL_RO_DATA_BASE
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#define BL1_RO_DATA_END round_up(BL1_ROM_END, PAGE_SIZE)
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#if BL2_IN_XIP_MEM
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#define BL2_CODE_END BL_CODE_END
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#define BL2_RO_DATA_BASE BL_RO_DATA_BASE
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#define BL2_RO_DATA_END round_up(BL2_ROM_END, PAGE_SIZE)
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#endif /* BL2_IN_XIP_MEM */
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#else
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#define BL_RO_DATA_BASE UL(0)
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#define BL_RO_DATA_END UL(0)
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#define BL1_CODE_END round_up(BL1_ROM_END, PAGE_SIZE)
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#if BL2_IN_XIP_MEM
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#define BL2_RO_DATA_BASE UL(0)
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#define BL2_RO_DATA_END UL(0)
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#define BL2_CODE_END round_up(BL2_ROM_END, PAGE_SIZE)
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#endif /* BL2_IN_XIP_MEM */
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#endif /* SEPARATE_CODE_AND_RODATA */
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#if MEASURED_BOOT
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/*
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* Start critical data Ids from 2^32/2 reserving Ids from 0 to (2^32/2 - 1)
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* for Images, It is a critical data Id base for all platforms.
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*/
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#define CRITICAL_DATA_ID_BASE U(0x80000000)
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#endif /* MEASURED_BOOT */
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#endif /* COMMON_DEF_H */
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