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225 lines
4.0 KiB
225 lines
4.0 KiB
Glossary
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========
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This glossary provides definitions for terms and abbreviations used in the TF-A
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documentation.
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You can find additional definitions in the `Arm Glossary`_.
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.. glossary::
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:sorted:
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AArch32
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32-bit execution state of the ARMv8 ISA
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AArch64
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64-bit execution state of the ARMv8 ISA
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AMU
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Activity Monitor Unit, a hardware monitoring unit introduced by FEAT_AMUv1
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that exposes CPU core runtime metrics as a set of counter registers.
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API
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Application Programming Interface
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AT
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Address Translation
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BTI
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Branch Target Identification. An Armv8.5 extension providing additional
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control flow integrity around indirect branches and their targets.
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CoT
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COT
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Chain of Trust
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CSS
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Compute Sub-System
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CVE
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Common Vulnerabilities and Exposures. A CVE document is commonly used to
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describe a publicly-known security vulnerability.
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DS-5
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Arm Development Studio 5
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DSU
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DynamIQ Shared Unit
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DT
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Device Tree
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DTB
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Device Tree Blob
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EL
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Exception Level
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EHF
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Exception Handling Framework
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FCONF
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Firmware Configuration Framework
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FDT
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Flattened Device Tree
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FF-A
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Firmware Framework for Arm A-profile
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FIP
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Firmware Image Package
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FVP
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Fixed Virtual Platform
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FWU
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FirmWare Update
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GIC
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Generic Interrupt Controller
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ISA
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Instruction Set Architecture
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Linaro
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A collaborative engineering organization consolidating
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and optimizing open source software and tools for the Arm architecture.
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MMU
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Memory Management Unit
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MPAM
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Memory Partitioning And Monitoring. An optional Armv8.4 extension.
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MPMM
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Maximum Power Mitigation Mechanism, an optional power management mechanism
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supported by some Arm Armv9-A cores.
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MPIDR
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Multiprocessor Affinity Register
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MTE
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Memory Tagging Extension. An optional Armv8.5 extension that enables
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hardware-assisted memory tagging.
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OEN
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Owning Entity Number
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OP-TEE
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Open Portable Trusted Execution Environment. An example of a :term:`TEE`
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OTE
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Open-source Trusted Execution Environment
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PDD
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Platform Design Document
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PAUTH
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Pointer Authentication. An optional extension introduced in Armv8.3.
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PMF
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Performance Measurement Framework
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PSA
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Platform Security Architecture
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PSCI
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Power State Coordination Interface
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RAS
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Reliability, Availability, and Serviceability extensions. A mandatory
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extension for the Armv8.2 architecture and later. An optional extension to
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the base Armv8 architecture.
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ROT
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Root of Trust
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SCMI
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System Control and Management Interface
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SCP
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System Control Processor
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SDEI
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Software Delegated Exception Interface
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SDS
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Shared Data Storage
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SEA
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Synchronous External Abort
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SiP
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SIP
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Silicon Provider
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SMC
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Secure Monitor Call
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SMCCC
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:term:`SMC` Calling Convention
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SoC
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System on Chip
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SP
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Secure Partition
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SPD
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Secure Payload Dispatcher
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SPM
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Secure Partition Manager
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SSBS
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Speculative Store Bypass Safe. Introduced in Armv8.5, this configuration
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bit can be set by software to allow or prevent the hardware from
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performing speculative operations.
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SVE
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Scalable Vector Extension
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TBB
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Trusted Board Boot
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TBBR
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Trusted Board Boot Requirements
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TEE
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Trusted Execution Environment
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TF-A
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Trusted Firmware-A
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TF-M
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Trusted Firmware-M
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TLB
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Translation Lookaside Buffer
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TLK
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Trusted Little Kernel. A Trusted OS from NVIDIA.
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TRNG
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True Randon Number Generator (hardware based)
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TSP
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Test Secure Payload
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TZC
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TrustZone Controller
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UBSAN
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Undefined Behavior Sanitizer
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UEFI
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Unified Extensible Firmware Interface
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WDOG
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Watchdog
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XLAT
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Translation (abbr.). For example, "XLAT table".
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.. _`Arm Glossary`: https://developer.arm.com/support/arm-glossary
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