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424 lines
11 KiB
424 lines
11 KiB
/*
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* Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include "rcar_def.h"
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#include "cpg_registers.h"
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#include "rcar_private.h"
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static void bl2_secure_cpg_init(void);
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#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N)
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static void bl2_realtime_cpg_init_h3(void);
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static void bl2_system_cpg_init_h3(void);
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#endif
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#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_M3)
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static void bl2_realtime_cpg_init_m3(void);
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static void bl2_system_cpg_init_m3(void);
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#endif
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#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_M3N)
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static void bl2_realtime_cpg_init_m3n(void);
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static void bl2_system_cpg_init_m3n(void);
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#endif
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#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_V3M)
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static void bl2_realtime_cpg_init_v3m(void);
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static void bl2_system_cpg_init_v3m(void);
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#endif
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#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_E3)
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static void bl2_realtime_cpg_init_e3(void);
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static void bl2_system_cpg_init_e3(void);
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#endif
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#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_D3)
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static void bl2_realtime_cpg_init_d3(void);
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static void bl2_system_cpg_init_d3(void);
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#endif
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typedef struct {
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uintptr_t adr;
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uint32_t val;
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} reg_setting_t;
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static void bl2_secure_cpg_init(void)
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{
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uint32_t stop_cr2, reset_cr2;
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uint32_t stop_cr4, reset_cr4;
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uint32_t stop_cr5, reset_cr5;
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#if (RCAR_LSI == RCAR_D3)
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reset_cr2 = 0x00000000U;
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stop_cr2 = 0xFFFFFFFFU;
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#elif (RCAR_LSI == RCAR_E3)
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reset_cr2 = 0x10000000U;
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stop_cr2 = 0xEFFFFFFFU;
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#else
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reset_cr2 = 0x14000000U;
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stop_cr2 = 0xEBFFFFFFU;
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#endif
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#if (RCAR_LSI == RCAR_D3)
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reset_cr4 = 0x00000000U;
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stop_cr4 = 0xFFFFFFFFU;
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reset_cr5 = 0x00000000U;
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stop_cr5 = 0xFFFFFFFFU;
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#else
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reset_cr4 = 0x80000003U;
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stop_cr4 = 0x7FFFFFFFU;
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reset_cr5 = 0x40000000U;
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stop_cr5 = 0xBFFFFFFFU;
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#endif
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/** Secure Module Stop Control Registers */
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cpg_write(SCMSTPCR0, 0xFFFFFFFFU);
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cpg_write(SCMSTPCR1, 0xFFFFFFFFU);
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cpg_write(SCMSTPCR2, stop_cr2);
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cpg_write(SCMSTPCR3, 0xFFFFFFFFU);
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cpg_write(SCMSTPCR4, stop_cr4);
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cpg_write(SCMSTPCR5, stop_cr5);
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cpg_write(SCMSTPCR6, 0xFFFFFFFFU);
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cpg_write(SCMSTPCR7, 0xFFFFFFFFU);
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cpg_write(SCMSTPCR8, 0xFFFFFFFFU);
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cpg_write(SCMSTPCR9, 0xFFFDFFFFU);
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cpg_write(SCMSTPCR10, 0xFFFFFFFFU);
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cpg_write(SCMSTPCR11, 0xFFFFFFFFU);
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/** Secure Software Reset Access Enable Control Registers */
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cpg_write(SCSRSTECR0, 0x00000000U);
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cpg_write(SCSRSTECR1, 0x00000000U);
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cpg_write(SCSRSTECR2, reset_cr2);
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cpg_write(SCSRSTECR3, 0x00000000U);
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cpg_write(SCSRSTECR4, reset_cr4);
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cpg_write(SCSRSTECR5, reset_cr5);
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cpg_write(SCSRSTECR6, 0x00000000U);
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cpg_write(SCSRSTECR7, 0x00000000U);
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cpg_write(SCSRSTECR8, 0x00000000U);
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cpg_write(SCSRSTECR9, 0x00020000U);
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cpg_write(SCSRSTECR10, 0x00000000U);
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cpg_write(SCSRSTECR11, 0x00000000U);
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}
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#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N)
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static void bl2_realtime_cpg_init_h3(void)
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{
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uint32_t cut = mmio_read_32(RCAR_PRR) & RCAR_CUT_MASK;
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uint32_t cr0, cr8;
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cr0 = (cut == RCAR_CUT_VER10 || cut == RCAR_CUT_VER11) ?
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0x00200000U : 0x00210000U;
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cr8 = (cut == RCAR_CUT_VER10 || cut == RCAR_CUT_VER11) ?
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0x01F1FFF4U : 0x01F1FFF7U;
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cpg_write(RMSTPCR0, cr0);
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cpg_write(RMSTPCR1, 0xFFFFFFFFU);
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cpg_write(RMSTPCR2, 0x040E0FDCU);
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cpg_write(RMSTPCR3, 0xFFFFFFDFU);
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cpg_write(RMSTPCR4, 0x80000004U);
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cpg_write(RMSTPCR5, 0xC3FFFFFFU);
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cpg_write(RMSTPCR6, 0xFFFFFFFFU);
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cpg_write(RMSTPCR7, 0xFFFFFFFFU);
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cpg_write(RMSTPCR8, cr8);
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cpg_write(RMSTPCR9, 0xFFFFFFFEU);
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cpg_write(RMSTPCR10, 0xFFFEFFE0U);
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cpg_write(RMSTPCR11, 0x000000B7U);
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}
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static void bl2_system_cpg_init_h3(void)
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{
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/** System Module Stop Control Registers */
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cpg_write(SMSTPCR0, 0x00210000U);
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cpg_write(SMSTPCR1, 0xFFFFFFFFU);
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cpg_write(SMSTPCR2, 0x040E2FDCU);
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cpg_write(SMSTPCR3, 0xFFFFFBDFU);
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cpg_write(SMSTPCR4, 0x80000004U);
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cpg_write(SMSTPCR5, 0xC3FFFFFFU);
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cpg_write(SMSTPCR6, 0xFFFFFFFFU);
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cpg_write(SMSTPCR7, 0xFFFFFFFFU);
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cpg_write(SMSTPCR8, 0x01F1FFF5U);
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cpg_write(SMSTPCR9, 0xFFFFFFFFU);
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cpg_write(SMSTPCR10, 0xFFFEFFE0U);
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cpg_write(SMSTPCR11, 0x000000B7U);
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}
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#endif
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#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_M3)
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static void bl2_realtime_cpg_init_m3(void)
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{
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/** Realtime Module Stop Control Registers */
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cpg_write(RMSTPCR0, 0x00200000U);
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cpg_write(RMSTPCR1, 0xFFFFFFFFU);
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cpg_write(RMSTPCR2, 0x040E0FDCU);
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cpg_write(RMSTPCR3, 0xFFFFFFDFU);
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cpg_write(RMSTPCR4, 0x80000004U);
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cpg_write(RMSTPCR5, 0xC3FFFFFFU);
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cpg_write(RMSTPCR6, 0xFFFFFFFFU);
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cpg_write(RMSTPCR7, 0xFFFFFFFFU);
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cpg_write(RMSTPCR8, 0x01F1FFF7U);
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cpg_write(RMSTPCR9, 0xFFFFFFFEU);
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cpg_write(RMSTPCR10, 0xFFFEFFE0U);
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cpg_write(RMSTPCR11, 0x000000B7U);
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}
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static void bl2_system_cpg_init_m3(void)
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{
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/** System Module Stop Control Registers */
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cpg_write(SMSTPCR0, 0x00200000U);
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cpg_write(SMSTPCR1, 0xFFFFFFFFU);
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cpg_write(SMSTPCR2, 0x040E2FDCU);
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cpg_write(SMSTPCR3, 0xFFFFFBDFU);
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cpg_write(SMSTPCR4, 0x80000004U);
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cpg_write(SMSTPCR5, 0xC3FFFFFFU);
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cpg_write(SMSTPCR6, 0xFFFFFFFFU);
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cpg_write(SMSTPCR7, 0xFFFFFFFFU);
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cpg_write(SMSTPCR8, 0x01F1FFF7U);
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cpg_write(SMSTPCR9, 0xFFFFFFFFU);
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cpg_write(SMSTPCR10, 0xFFFEFFE0U);
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cpg_write(SMSTPCR11, 0x000000B7U);
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}
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#endif
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#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_M3N)
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static void bl2_realtime_cpg_init_m3n(void)
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{
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/** Realtime Module Stop Control Registers */
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cpg_write(RMSTPCR0, 0x00210000U);
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cpg_write(RMSTPCR1, 0xFFFFFFFFU);
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cpg_write(RMSTPCR2, 0x040E0FDCU);
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cpg_write(RMSTPCR3, 0xFFFFFFDFU);
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cpg_write(RMSTPCR4, 0x80000004U);
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cpg_write(RMSTPCR5, 0xC3FFFFFFU);
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cpg_write(RMSTPCR6, 0xFFFFFFFFU);
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cpg_write(RMSTPCR7, 0xFFFFFFFFU);
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cpg_write(RMSTPCR8, 0x00F1FFF7U);
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cpg_write(RMSTPCR9, 0xFFFFFFFFU);
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cpg_write(RMSTPCR10, 0xFFFFFFE0U);
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cpg_write(RMSTPCR11, 0x000000B7U);
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}
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static void bl2_system_cpg_init_m3n(void)
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{
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/* System Module Stop Control Registers */
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cpg_write(SMSTPCR0, 0x00210000U);
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cpg_write(SMSTPCR1, 0xFFFFFFFFU);
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cpg_write(SMSTPCR2, 0x040E2FDCU);
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cpg_write(SMSTPCR3, 0xFFFFFBDFU);
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cpg_write(SMSTPCR4, 0x80000004U);
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cpg_write(SMSTPCR5, 0xC3FFFFFFU);
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cpg_write(SMSTPCR6, 0xFFFFFFFFU);
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cpg_write(SMSTPCR7, 0xFFFFFFFFU);
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cpg_write(SMSTPCR8, 0x00F1FFF7U);
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cpg_write(SMSTPCR9, 0xFFFFFFFFU);
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cpg_write(SMSTPCR10, 0xFFFFFFE0U);
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cpg_write(SMSTPCR11, 0x000000B7U);
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}
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#endif
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#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_V3M)
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static void bl2_realtime_cpg_init_v3m(void)
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{
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/* Realtime Module Stop Control Registers */
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cpg_write(RMSTPCR0, 0x00230000U);
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cpg_write(RMSTPCR1, 0xFFFFFFFFU);
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cpg_write(RMSTPCR2, 0x14062FD8U);
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cpg_write(RMSTPCR3, 0xFFFFFFDFU);
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cpg_write(RMSTPCR4, 0x80000184U);
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cpg_write(RMSTPCR5, 0x83FFFFFFU);
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cpg_write(RMSTPCR6, 0xFFFFFFFFU);
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cpg_write(RMSTPCR7, 0xFFFFFFFFU);
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cpg_write(RMSTPCR8, 0x7FF3FFF4U);
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cpg_write(RMSTPCR9, 0xFFFFFFFEU);
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}
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static void bl2_system_cpg_init_v3m(void)
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{
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/* System Module Stop Control Registers */
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cpg_write(SMSTPCR0, 0x00210000U);
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cpg_write(SMSTPCR1, 0xFFFFFFFFU);
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cpg_write(SMSTPCR2, 0x340E2FDCU);
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cpg_write(SMSTPCR3, 0xFFFFFBDFU);
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cpg_write(SMSTPCR4, 0x80000004U);
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cpg_write(SMSTPCR5, 0xC3FFFFFFU);
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cpg_write(SMSTPCR6, 0xFFFFFFFFU);
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cpg_write(SMSTPCR7, 0xFFFFFFFFU);
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cpg_write(SMSTPCR8, 0x01F1FFF5U);
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cpg_write(SMSTPCR9, 0xFFFFFFFEU);
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}
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#endif
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#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_E3)
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static void bl2_realtime_cpg_init_e3(void)
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{
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/* Realtime Module Stop Control Registers */
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cpg_write(RMSTPCR0, 0x00210000U);
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cpg_write(RMSTPCR1, 0xFFFFFFFFU);
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cpg_write(RMSTPCR2, 0x000E0FDCU);
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cpg_write(RMSTPCR3, 0xFFFFFFDFU);
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cpg_write(RMSTPCR4, 0x80000004U);
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cpg_write(RMSTPCR5, 0xC3FFFFFFU);
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cpg_write(RMSTPCR6, 0xFFFFFFFFU);
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cpg_write(RMSTPCR7, 0xFFFFFFFFU);
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cpg_write(RMSTPCR8, 0x00F1FFF7U);
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cpg_write(RMSTPCR9, 0xFFFFFFDFU);
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cpg_write(RMSTPCR10, 0xFFFFFFE8U);
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cpg_write(RMSTPCR11, 0x000000B7U);
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}
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static void bl2_system_cpg_init_e3(void)
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{
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/* System Module Stop Control Registers */
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cpg_write(SMSTPCR0, 0x00210000U);
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cpg_write(SMSTPCR1, 0xFFFFFFFFU);
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cpg_write(SMSTPCR2, 0x000E2FDCU);
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cpg_write(SMSTPCR3, 0xFFFFFBDFU);
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cpg_write(SMSTPCR4, 0x80000004U);
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cpg_write(SMSTPCR5, 0xC3FFFFFFU);
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cpg_write(SMSTPCR6, 0xFFFFFFFFU);
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cpg_write(SMSTPCR7, 0xFFFFFFFFU);
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cpg_write(SMSTPCR8, 0x00F1FFF7U);
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cpg_write(SMSTPCR9, 0xFFFFFFDFU);
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cpg_write(SMSTPCR10, 0xFFFFFFE8U);
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cpg_write(SMSTPCR11, 0x000000B7U);
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}
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#endif
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#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_D3)
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static void bl2_realtime_cpg_init_d3(void)
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{
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/* Realtime Module Stop Control Registers */
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cpg_write(RMSTPCR0, 0x00010000U);
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cpg_write(RMSTPCR1, 0xFFFFFFFFU);
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cpg_write(RMSTPCR2, 0x00060FDCU);
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cpg_write(RMSTPCR3, 0xFFFFFFDFU);
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cpg_write(RMSTPCR4, 0x80000184U);
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cpg_write(RMSTPCR5, 0x83FFFFFFU);
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cpg_write(RMSTPCR6, 0xFFFFFFFFU);
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cpg_write(RMSTPCR7, 0xFFFFFFFFU);
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cpg_write(RMSTPCR8, 0x00F1FFF7U);
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cpg_write(RMSTPCR9, 0xF3F5E016U);
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cpg_write(RMSTPCR10, 0xFFFEFFE0U);
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cpg_write(RMSTPCR11, 0x000000B7U);
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}
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static void bl2_system_cpg_init_d3(void)
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{
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/* System Module Stop Control Registers */
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cpg_write(SMSTPCR0, 0x00010000U);
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cpg_write(SMSTPCR1, 0xFFFFFFFFU);
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cpg_write(SMSTPCR2, 0x00060FDCU);
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cpg_write(SMSTPCR3, 0xFFFFFBDFU);
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cpg_write(SMSTPCR4, 0x00000084U);
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cpg_write(SMSTPCR5, 0x83FFFFFFU);
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cpg_write(SMSTPCR6, 0xFFFFFFFFU);
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cpg_write(SMSTPCR7, 0xFFFFFFFFU);
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cpg_write(SMSTPCR8, 0x00F1FFF7U);
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cpg_write(SMSTPCR9, 0xF3F5E016U);
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cpg_write(SMSTPCR10, 0xFFFEFFE0U);
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cpg_write(SMSTPCR11, 0x000000B7U);
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}
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#endif
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void bl2_cpg_init(void)
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{
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uint32_t boot_cpu = mmio_read_32(RCAR_MODEMR) & MODEMR_BOOT_CPU_MASK;
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#if RCAR_LSI == RCAR_AUTO
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uint32_t product = mmio_read_32(RCAR_PRR) & RCAR_PRODUCT_MASK;
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#endif
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bl2_secure_cpg_init();
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if (boot_cpu == MODEMR_BOOT_CPU_CA57 ||
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boot_cpu == MODEMR_BOOT_CPU_CA53) {
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#if RCAR_LSI == RCAR_AUTO
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switch (product) {
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case RCAR_PRODUCT_H3:
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bl2_realtime_cpg_init_h3();
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break;
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case RCAR_PRODUCT_M3:
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bl2_realtime_cpg_init_m3();
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break;
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case RCAR_PRODUCT_M3N:
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bl2_realtime_cpg_init_m3n();
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break;
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case RCAR_PRODUCT_V3M:
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bl2_realtime_cpg_init_v3m();
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break;
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case RCAR_PRODUCT_E3:
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bl2_realtime_cpg_init_e3();
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break;
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case RCAR_PRODUCT_D3:
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bl2_realtime_cpg_init_d3();
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break;
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default:
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panic();
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break;
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}
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#elif (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N)
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bl2_realtime_cpg_init_h3();
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#elif RCAR_LSI == RCAR_M3
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bl2_realtime_cpg_init_m3();
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#elif RCAR_LSI == RCAR_M3N
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bl2_realtime_cpg_init_m3n();
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#elif RCAR_LSI == RCAR_V3M
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bl2_realtime_cpg_init_v3m();
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#elif RCAR_LSI == RCAR_E3
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bl2_realtime_cpg_init_e3();
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#elif RCAR_LSI == RCAR_D3
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bl2_realtime_cpg_init_d3();
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#else
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#error "Don't have CPG initialize routine(unknown)."
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#endif
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}
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}
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void bl2_system_cpg_init(void)
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{
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#if RCAR_LSI == RCAR_AUTO
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uint32_t product = mmio_read_32(RCAR_PRR) & RCAR_PRODUCT_MASK;
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switch (product) {
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case RCAR_PRODUCT_H3:
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bl2_system_cpg_init_h3();
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break;
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case RCAR_PRODUCT_M3:
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bl2_system_cpg_init_m3();
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break;
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case RCAR_PRODUCT_M3N:
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bl2_system_cpg_init_m3n();
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break;
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case RCAR_PRODUCT_V3M:
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bl2_system_cpg_init_v3m();
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break;
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case RCAR_PRODUCT_E3:
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bl2_system_cpg_init_e3();
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break;
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case RCAR_PRODUCT_D3:
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bl2_system_cpg_init_d3();
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break;
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default:
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panic();
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break;
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}
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#elif (RCAR_LSI == RCAR_H3) || (RCAR_LSI == RCAR_H3N)
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bl2_system_cpg_init_h3();
|
|
#elif RCAR_LSI == RCAR_M3
|
|
bl2_system_cpg_init_m3();
|
|
#elif RCAR_LSI == RCAR_M3N
|
|
bl2_system_cpg_init_m3n();
|
|
#elif RCAR_LSI == RCAR_V3M
|
|
bl2_system_cpg_init_v3m();
|
|
#elif RCAR_LSI == RCAR_E3
|
|
bl2_system_cpg_init_e3();
|
|
#elif RCAR_LSI == RCAR_D3
|
|
bl2_system_cpg_init_d3();
|
|
#else
|
|
#error "Don't have CPG initialize routine(unknown)."
|
|
#endif
|
|
}
|
|
|