Make clear_cache safe

cranelift/jit/src/memory.rs

@@ -176,10 +176,7 @@ impl Memory {
         // Do this before marking the memory as R+X, technically we should be able to do it after
         // but there are some CPU's that have had errata about doing this with read only memory.
         for &PtrLen { ptr, len, .. } in self.non_protected_allocations_iter() {
-            unsafe {
-                icache_coherence::clear_cache(ptr as *const c_void, len)
-                    .expect("Failed cache clear")
-            };
+            icache_coherence::clear_cache(ptr as *const c_void, len).expect("Failed cache clear")
         }
 
         // Flush any in-flight instructions from the pipeline

crates/jit-icache-coherence/src/lib.rs

@@ -42,7 +42,6 @@
 //! #    addr: &code[0] as *const u8 as *const c_void,
 //! #    len: code.len(),
 //! # }];
-//! # unsafe {
 //! // Invalidate the cache for all the newly written pages where we wrote our new code.
 //! for page in newly_written_pages {
 //!     clear_cache(page.addr, page.len)?;
@@ -53,7 +52,6 @@
 //!
 //! // We can now safely execute our new code.
 //! run_code();
-//! # }
 //! # Ok(())
 //! # }
 //! ```
@@ -98,11 +96,6 @@ pub fn pipeline_flush() -> Result<()> {
 /// Flushes the instruction cache for a region of memory.
 ///
 /// If the architecture does not require an instruction cache flush, this function does nothing.
-///
-/// # Unsafe
-///
-/// You must always call [pipeline_flush] calling just [clear_cache]
-/// is not sufficient.
-pub unsafe fn clear_cache(ptr: *const c_void, len: usize) -> Result<()> {
+pub fn clear_cache(ptr: *const c_void, len: usize) -> Result<()> {
     imp::clear_cache(ptr, len)
 }