Winch: Use Option<u8> for register indexes (#7993)

* Winch: Use 16 bit numbers for register indexes

* Add 400 params test case as a filetest for Aarch64

* Switch x86 RegIndexEnv to return Option<u8>

build.rs

@@ -208,7 +208,6 @@ fn ignore(testsuite: &str, testname: &str, strategy: &str) -> bool {
         if testsuite == "misc_testsuite" {
             let denylist = [
                 "externref_id_function",
-                "func_400_params",
                 "int_to_float_splat",
                 "issue6562",
                 "many_table_gets_lead_to_gc",

winch/codegen/src/isa/x64/abi.rs

@@ -36,11 +36,11 @@ impl RegIndexEnv {
 }
 
 impl RegIndexEnv {
-    fn next_gpr(&mut self) -> u8 {
+    fn next_gpr(&mut self) -> Option<u8> {
         Self::increment(&mut self.gpr_or_absolute_count)
     }
 
-    fn next_fpr(&mut self) -> u8 {
+    fn next_fpr(&mut self) -> Option<u8> {
         if self.absolute_count {
             Self::increment(&mut self.gpr_or_absolute_count)
         } else {
@@ -48,10 +48,15 @@ impl RegIndexEnv {
         }
     }
 
-    fn increment(index: &mut u8) -> u8 {
+    fn increment(index: &mut u8) -> Option<u8> {
         let current = *index;
-        *index += 1;
+        match index.checked_add(1) {
-        current
+            Some(next) => {
+                *index = next;
+                Some(current)
+            }
+            None => None,
+        }
     }
 }
 
@@ -249,12 +254,17 @@ impl X64ABI {
     }
 
     fn int_reg_for(
-        index: u8,
+        index: Option<u8>,
         call_conv: &CallingConvention,
         params_or_returns: ParamsOrReturns,
     ) -> Option<Reg> {
         use ParamsOrReturns::*;
 
+        let index = match index {
+            None => return None,
+            Some(index) => index,
+        };
+
         if call_conv.is_fastcall() {
             return match (index, params_or_returns) {
                 (0, Params) => Some(regs::rcx()),
@@ -283,11 +293,17 @@ impl X64ABI {
     }
 
     fn float_reg_for(
-        index: u8,
+        index: Option<u8>,
         call_conv: &CallingConvention,
         params_or_returns: ParamsOrReturns,
     ) -> Option<Reg> {
         use ParamsOrReturns::*;
+
+        let index = match index {
+            None => return None,
+            Some(index) => index,
+        };
+
         if call_conv.is_fastcall() {
             return match (index, params_or_returns) {
                 (0, Params) => Some(regs::xmm0()),
@@ -335,21 +351,21 @@ mod tests {
     #[test]
     fn test_get_next_reg_index() {
         let mut index_env = RegIndexEnv::default();
-        assert_eq!(index_env.next_fpr(), 0);
+        assert_eq!(index_env.next_fpr(), Some(0));
-        assert_eq!(index_env.next_gpr(), 0);
+        assert_eq!(index_env.next_gpr(), Some(0));
-        assert_eq!(index_env.next_fpr(), 1);
+        assert_eq!(index_env.next_fpr(), Some(1));
-        assert_eq!(index_env.next_gpr(), 1);
+        assert_eq!(index_env.next_gpr(), Some(1));
-        assert_eq!(index_env.next_fpr(), 2);
+        assert_eq!(index_env.next_fpr(), Some(2));
-        assert_eq!(index_env.next_gpr(), 2);
+        assert_eq!(index_env.next_gpr(), Some(2));
     }
 
     #[test]
     fn test_reg_index_env_absolute_count() {
         let mut e = RegIndexEnv::with_absolute_count();
-        assert!(e.next_gpr() == 0);
+        assert!(e.next_gpr() == Some(0));
-        assert!(e.next_fpr() == 1);
+        assert!(e.next_fpr() == Some(1));
-        assert!(e.next_gpr() == 2);
+        assert!(e.next_gpr() == Some(2));
-        assert!(e.next_fpr() == 3);
+        assert!(e.next_fpr() == Some(3));
     }
 
     #[test]

winch/filetests/filetests/aarch64/params/400_params.wat

@@ -0,0 +1,69 @@
+;;! target = "aarch64"
+
+(module
+  (type (;0;) (func (param
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+    i32 i32 i32 i32 i32 i32 i32 i32 i32 i32
+  )
+
+    (result i32)
+  ))
+  (func (export "x") (type 0) local.get 0)
+)
+;;      	 fd7bbfa9             	stp	x29, x30, [sp, #-0x10]!
+;;      	 fd030091             	mov	x29, sp
+;;      	 fc030091             	mov	x28, sp
+;;      	 e90300aa             	mov	x9, x0
+;;      	 ffa300d1             	sub	sp, sp, #0x28
+;;      	 fc030091             	mov	x28, sp
+;;      	 800302f8             	stur	x0, [x28, #0x20]
+;;      	 818301f8             	stur	x1, [x28, #0x18]
+;;      	 824301b8             	stur	w2, [x28, #0x14]
+;;      	 830301b8             	stur	w3, [x28, #0x10]
+;;      	 84c300b8             	stur	w4, [x28, #0xc]
+;;      	 858300b8             	stur	w5, [x28, #8]
+;;      	 864300b8             	stur	w6, [x28, #4]
+;;      	 870300b8             	stur	w7, [x28]
+;;      	 804341b8             	ldur	w0, [x28, #0x14]
+;;      	 ffa30091             	add	sp, sp, #0x28
+;;      	 fc030091             	mov	x28, sp
+;;      	 fd7bc1a8             	ldp	x29, x30, [sp], #0x10
+;;      	 c0035fd6             	ret