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Merge pull request #3055 from bnjbvr/ben-dce

Remove some dead code in Cranelift
pull/3057/head
Chris Fallin 3 years ago
committed by GitHub
parent
commit
518ce2512d
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  1. 3
      cranelift/codegen/src/lib.rs
  2. 18
      cranelift/codegen/src/machinst/abi.rs
  3. 32
      cranelift/codegen/src/machinst/abi_impl.rs
  4. 14
      cranelift/codegen/src/machinst/blockorder.rs
  5. 32
      cranelift/codegen/src/machinst/vcode.rs
  6. 2
      crates/cranelift/src/lib.rs

3
cranelift/codegen/src/lib.rs

@ -77,7 +77,6 @@ pub mod flowgraph;
pub mod ir;
pub mod isa;
pub mod loop_analysis;
pub mod machinst;
pub mod print_errors;
pub mod settings;
pub mod timing;
@ -85,6 +84,7 @@ pub mod verifier;
pub mod write;
pub use crate::entity::packed_option;
pub use crate::machinst::buffer::MachSrcLoc;
mod abi;
mod bitset;
@ -98,6 +98,7 @@ mod iterators;
mod legalizer;
mod licm;
mod log;
mod machinst;
mod nan_canonicalization;
mod partition_slice;
mod postopt;

18
cranelift/codegen/src/machinst/abi.rs

@ -111,24 +111,6 @@ pub trait ABICallee {
/// Get the address of a stackslot.
fn stackslot_addr(&self, slot: StackSlot, offset: u32, into_reg: Writable<Reg>) -> Self::I;
/// Load from a stackslot.
fn load_stackslot(
&self,
slot: StackSlot,
offset: u32,
ty: Type,
into_reg: ValueRegs<Writable<Reg>>,
) -> SmallInstVec<Self::I>;
/// Store to a stackslot.
fn store_stackslot(
&self,
slot: StackSlot,
offset: u32,
ty: Type,
from_reg: ValueRegs<Reg>,
) -> SmallInstVec<Self::I>;
/// Load from a spillslot.
fn load_spillslot(
&self,

32
cranelift/codegen/src/machinst/abi_impl.rs

@ -1157,38 +1157,6 @@ impl<M: ABIMachineSpec> ABICallee for ABICalleeImpl<M> {
self.clobbered = clobbered;
}
/// Load from a stackslot.
fn load_stackslot(
&self,
slot: StackSlot,
offset: u32,
ty: Type,
into_regs: ValueRegs<Writable<Reg>>,
) -> SmallInstVec<Self::I> {
// Offset from beginning of stackslot area, which is at nominal SP (see
// [MemArg::NominalSPOffset] for more details on nominal SP tracking).
let stack_off = self.stackslots[slot] as i64;
let sp_off: i64 = stack_off + (offset as i64);
trace!("load_stackslot: slot {} -> sp_off {}", slot, sp_off);
gen_load_stack_multi::<M>(StackAMode::NominalSPOffset(sp_off, ty), into_regs, ty)
}
/// Store to a stackslot.
fn store_stackslot(
&self,
slot: StackSlot,
offset: u32,
ty: Type,
from_regs: ValueRegs<Reg>,
) -> SmallInstVec<Self::I> {
// Offset from beginning of stackslot area, which is at nominal SP (see
// [MemArg::NominalSPOffset] for more details on nominal SP tracking).
let stack_off = self.stackslots[slot] as i64;
let sp_off: i64 = stack_off + (offset as i64);
trace!("store_stackslot: slot {} -> sp_off {}", slot, sp_off);
gen_store_stack_multi::<M>(StackAMode::NominalSPOffset(sp_off, ty), from_regs, ty)
}
/// Produce an instruction that computes a stackslot address.
fn stackslot_addr(&self, slot: StackSlot, offset: u32, into_reg: Writable<Reg>) -> Self::I {
// Offset from beginning of stackslot area, which is at nominal SP (see

14
cranelift/codegen/src/machinst/blockorder.rs

@ -420,25 +420,11 @@ impl BlockLoweringOrder {
&self.lowered_order[..]
}
/// Get the successors for a lowered block, by index in `lowered_order()`'s
/// returned slice. Each successsor is paired with the edge-instruction
/// (branch) corresponding to this edge.
pub fn succs(&self, block: BlockIndex) -> &[(Inst, LoweredBlock)] {
let range = self.lowered_succ_ranges[block as usize];
&self.lowered_succs[range.0..range.1]
}
/// Get the successor indices for a lowered block.
pub fn succ_indices(&self, block: BlockIndex) -> &[(Inst, BlockIndex)] {
let range = self.lowered_succ_ranges[block as usize];
&self.lowered_succ_indices[range.0..range.1]
}
/// Get the lowered block index containing a CLIF block, if any. (May not be
/// present if the original CLIF block was unreachable.)
pub fn lowered_block_for_bb(&self, bb: Block) -> Option<BlockIndex> {
self.orig_map[bb]
}
}
#[cfg(test)]

32
cranelift/codegen/src/machinst/vcode.rs

@ -41,8 +41,6 @@ use std::string::String;
pub type InsnIndex = u32;
/// Index referring to a basic block in VCode.
pub type BlockIndex = u32;
/// Range of an instructions in VCode.
pub type InsnRange = core::ops::Range<InsnIndex>;
/// VCodeInst wraps all requirements for a MachInst to be in VCode: it must be
/// a `MachInst` and it must be able to emit itself at least to a `SizeCodeSink`.
@ -207,11 +205,6 @@ impl<I: VCodeInst> VCodeBuilder<I> {
}
}
/// Are there any reference-typed values at all among the vregs?
pub fn have_ref_values(&self) -> bool {
self.vcode.have_ref_values()
}
/// Set the current block as the entry block.
pub fn set_entry(&mut self, block: BlockIndex) {
self.vcode.entry = block;
@ -264,11 +257,6 @@ impl<I: VCodeInst> VCodeBuilder<I> {
}
}
/// Get the current source location.
pub fn get_srcloc(&self) -> SourceLoc {
self.cur_srcloc
}
/// Set the current source location.
pub fn set_srcloc(&mut self, srcloc: SourceLoc) {
self.cur_srcloc = srcloc;
@ -344,16 +332,6 @@ impl<I: VCodeInst> VCode<I> {
self.vreg_types[vreg.get_index()]
}
/// Are there any reference-typed values at all among the vregs?
pub fn have_ref_values(&self) -> bool {
self.have_ref_values
}
/// Get the entry block.
pub fn entry(&self) -> BlockIndex {
self.entry
}
/// Get the number of blocks. Block indices will be in the range `0 ..
/// (self.num_blocks() - 1)`.
pub fn num_blocks(&self) -> usize {
@ -365,11 +343,6 @@ impl<I: VCodeInst> VCode<I> {
self.abi.frame_size()
}
/// Inbound stack-args size.
pub fn stack_args_size(&self) -> u32 {
self.abi.stack_args_size()
}
/// Get the successors for a block.
pub fn succs(&self, block: BlockIndex) -> &[BlockIx] {
let (start, end) = self.block_succ_range[block as usize];
@ -886,11 +859,6 @@ impl VCodeConstants {
}
}
/// Retrieve a byte slice for the given [VCodeConstant], if available.
pub fn get(&self, constant: VCodeConstant) -> Option<&[u8]> {
self.constants.get(constant).map(|d| d.as_slice())
}
/// Return the number of constants inserted.
pub fn len(&self) -> usize {
self.constants.len()

2
crates/cranelift/src/lib.rs

@ -91,8 +91,8 @@
use crate::func_environ::{get_func_name, FuncEnvironment};
use cranelift_codegen::ir::{self, ExternalName};
use cranelift_codegen::isa::{CallConv, TargetIsa};
use cranelift_codegen::machinst::buffer::MachSrcLoc;
use cranelift_codegen::print_errors::pretty_error;
use cranelift_codegen::MachSrcLoc;
use cranelift_codegen::{binemit, isa, Context};
use cranelift_wasm::{DefinedFuncIndex, FuncIndex, FuncTranslator, SignatureIndex, WasmType};
use std::convert::TryFrom;

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