From cb30ecc7bcc9602881ea401b51dd54c6812674ce Mon Sep 17 00:00:00 2001 From: dheaton-arm Date: Tue, 7 Sep 2021 12:19:00 +0100 Subject: [PATCH 1/2] Implement `Iabs` for the interpreter Implemented `Iabs` to return the absolute integer value with wrapping. Copyright (c) 2021, Arm Limited --- .../filetests/filetests/runtests/iabs.clif | 42 +++++++++++++++++++ .../filetests/runtests/simd-iabs.clif | 34 +++++++++++++++ cranelift/interpreter/src/step.rs | 25 ++++++++++- 3 files changed, 100 insertions(+), 1 deletion(-) create mode 100644 cranelift/filetests/filetests/runtests/iabs.clif create mode 100644 cranelift/filetests/filetests/runtests/simd-iabs.clif diff --git a/cranelift/filetests/filetests/runtests/iabs.clif b/cranelift/filetests/filetests/runtests/iabs.clif new file mode 100644 index 0000000000..acf2bf8584 --- /dev/null +++ b/cranelift/filetests/filetests/runtests/iabs.clif @@ -0,0 +1,42 @@ +test interpret +; aarch64 & x86_64 only support vector iabs + +function %iabs_i8(i8) -> i8 { +block0(v0: i8): + v1 = iabs v0 + return v1 +} +; run: %iabs_i8(0) == 0 +; run: %iabs_i8(127) == 127 +; run: %iabs_i8(-127) == 127 +; run: %iabs_i8(-128) == -128 + +function %iabs_i16(i16) -> i16 { +block0(v0: i16): + v1 = iabs v0 + return v1 +} +; run: %iabs_i16(0) == 0 +; run: %iabs_i16(32767) == 32767 +; run: %iabs_i16(-32767) == 32767 +; run: %iabs_i16(-32768) == -32768 + +function %iabs_i32(i32) -> i32 { +block0(v0: i32): + v1 = iabs v0 + return v1 +} +; run: %iabs_i32(0) == 0 +; run: %iabs_i32(2147483647) == 2147483647 +; run: %iabs_i32(-2147483647) == 2147483647 +; run: %iabs_i32(-2147483648) == -2147483648 + +function %iabs_i64(i64) -> i64 { +block0(v0: i64): + v1 = iabs v0 + return v1 +} +; run: %iabs_i64(0) == 0 +; run: %iabs_i64(9223372036854775807) == 9223372036854775807 +; run: %iabs_i64(-9223372036854775807) == 9223372036854775807 +; run: %iabs_i64(-9223372036854775808) == -9223372036854775808 \ No newline at end of file diff --git a/cranelift/filetests/filetests/runtests/simd-iabs.clif b/cranelift/filetests/filetests/runtests/simd-iabs.clif new file mode 100644 index 0000000000..ee1db6762c --- /dev/null +++ b/cranelift/filetests/filetests/runtests/simd-iabs.clif @@ -0,0 +1,34 @@ +test interpret +test run +target aarch64 +set enable_simd +target x86_64 + +function %iabs_i8x16(i8x16) -> i8x16 { +block0(v0: i8x16): + v1 = iabs v0 + return v1 +} +; run: %iabs_i8x16([0 0 0 0 127 127 127 127 -127 -127 -127 -127 -128 -128 -128 -128]) == [0 0 0 0 127 127 127 127 127 127 127 127 -128 -128 -128 -128] + +function %iabs_i16x8(i16x8) -> i16x8 { +block0(v0: i16x8): + v1 = iabs v0 + return v1 +} +; run: %iabs_i16x8([0 0 32767 32767 -32767 -32767 -32768 -32768]) == [0 0 32767 32767 32767 32767 -32768 -32768] + +function %iabs_i32x4(i32x4) -> i32x4 { +block0(v0: i32x4): + v1 = iabs v0 + return v1 +} +; run: %iabs_i32x4([0 2147483647 -2147483647 -2147483648]) == [0 2147483647 2147483647 -2147483648] + +function %iabs_i64x2(i64x2) -> i64x2 { +block0(v0: i64x2): + v1 = iabs v0 + return v1 +} +; run: %iabs_i64x2([0 9223372036854775807]) == [0 9223372036854775807] +; run: %iabs_i64x2([-9223372036854775807 -9223372036854775808]) == [9223372036854775807 -9223372036854775808] diff --git a/cranelift/interpreter/src/step.rs b/cranelift/interpreter/src/step.rs index 7fc16b06f7..f55421420a 100644 --- a/cranelift/interpreter/src/step.rs +++ b/cranelift/interpreter/src/step.rs @@ -557,7 +557,30 @@ where false, )?), Opcode::Ineg => binary(Value::sub, Value::int(0, ctrl_ty)?, arg(0)?)?, - Opcode::Iabs => unimplemented!("Iabs"), + Opcode::Iabs => { + let (min_val, _) = ctrl_ty.lane_type().bounds(true); + let min_val: V = Value::int(min_val as i128, ctrl_ty.lane_type())?; + if ctrl_ty.is_vector() { + let arg0 = extractlanes(&arg(0)?, ctrl_ty.lane_type())?; + let new_vec = arg0 + .into_iter() + .map(|lane| { + if Value::eq(&lane, &min_val)? { + Ok(min_val.clone()) + } else { + Value::int(lane.into_int()?.abs(), ctrl_ty.lane_type()) + } + }) + .collect::>>()?; + assign(vectorizelanes(&new_vec, ctrl_ty)?) + } else { + assign(if Value::eq(&arg(0)?, &min_val)? { + min_val.clone() + } else { + Value::int(arg(0)?.into_int()?.abs(), ctrl_ty.lane_type())? + }) + } + } Opcode::Imul => binary(Value::mul, arg(0)?, arg(1)?)?, Opcode::Umulhi | Opcode::Smulhi => { let double_length = match ctrl_ty.lane_bits() { From 539b1de5f4894d21d7bef422978a11254ce91882 Mon Sep 17 00:00:00 2001 From: dheaton-arm Date: Wed, 22 Sep 2021 13:48:59 +0100 Subject: [PATCH 2/2] Prevent test running on legacy backend. Copyright (c) 2021, Arm Limited --- cranelift/filetests/filetests/runtests/simd-iabs.clif | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cranelift/filetests/filetests/runtests/simd-iabs.clif b/cranelift/filetests/filetests/runtests/simd-iabs.clif index ee1db6762c..022815c4a4 100644 --- a/cranelift/filetests/filetests/runtests/simd-iabs.clif +++ b/cranelift/filetests/filetests/runtests/simd-iabs.clif @@ -2,7 +2,7 @@ test interpret test run target aarch64 set enable_simd -target x86_64 +target x86_64 machinst function %iabs_i8x16(i8x16) -> i8x16 { block0(v0: i8x16):