Don't reuse destination registers when lowering splat on aarch64 (#5370)

cranelift/codegen/src/isa/aarch64/inst/mod.rs

@@ -421,8 +421,9 @@ impl Inst {
                 size
             }]
         } else if let Some(imm) = widen_32_bit_pattern(pattern, lane_size) {
+            let tmp = alloc_tmp(types::I64X2);
             let mut insts = smallvec![Inst::VecDupImm {
-                rd,
+                rd: tmp,
                 imm,
                 invert: false,
                 size: VectorSize::Size64x2,
@@ -433,7 +434,7 @@ impl Inst {
             if !size.is_128bits() {
                 insts.push(Inst::FpuExtend {
                     rd,
-                    rn: rd.to_reg(),
+                    rn: tmp.to_reg(),
                     size: ScalarSize::Size64,
                 });
             }

cranelift/filetests/filetests/isa/aarch64/simd.clif

@@ -101,8 +101,8 @@ block0:
 }
 
 ; block0:
-;   movi v0.2d, #18374687579166474495
+;   movi v1.2d, #18374687579166474495
-;   fmov d0, d0
+;   fmov d0, d1
 ;   ret
 
 function %f10() -> i32x4 {