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Merge pull request #3745 from uweigand/move-emit

Move emit and emit_safepoint to prelude.isle
pull/3755/head
Nick Fitzgerald 3 years ago
committed by GitHub
parent
commit
8ba3294881
No known key found for this signature in database GPG Key ID: 4AEE18F83AFDEB23
  1. 7
      cranelift/codegen/src/isa/aarch64/inst.isle
  2. 4
      cranelift/codegen/src/isa/aarch64/lower/isle.rs
  3. 4
      cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.manifest
  4. 365
      cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.rs
  5. 14
      cranelift/codegen/src/isa/s390x/inst.isle
  6. 4
      cranelift/codegen/src/isa/s390x/lower/isle/generated_code.manifest
  7. 884
      cranelift/codegen/src/isa/s390x/lower/isle/generated_code.rs
  8. 7
      cranelift/codegen/src/isa/x64/inst.isle
  9. 4
      cranelift/codegen/src/isa/x64/lower/isle.rs
  10. 4
      cranelift/codegen/src/isa/x64/lower/isle/generated_code.manifest
  11. 297
      cranelift/codegen/src/isa/x64/lower/isle/generated_code.rs
  12. 19
      cranelift/codegen/src/prelude.isle

7
cranelift/codegen/src/isa/aarch64/inst.isle

@ -1371,13 +1371,6 @@
;; Instruction creation helpers ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Emit an instruction.
;;
;; This is low-level and side-effectful; it should only be used as an
;; implementation detail by helpers that preserve the SSA facade themselves.
(decl emit (MInst) Unit)
(extern constructor emit emit)
;; Helper for creating the zero register.
(decl zero_reg () Reg)
(extern constructor zero_reg zero_reg)

4
cranelift/codegen/src/isa/aarch64/lower/isle.rs

@ -203,6 +203,10 @@ where
self.emitted_insts.push((inst.clone(), false));
}
fn emit_safepoint(&mut self, inst: &MInst) -> Unit {
self.emitted_insts.push((inst.clone(), true));
}
fn cond_br_zero(&mut self, reg: Reg) -> CondBrKind {
CondBrKind::Zero(reg)
}

4
cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.manifest

@ -1,4 +1,4 @@
src/clif.isle 9ea75a6f790b5c03
src/prelude.isle 51d2aef2566c1c96
src/isa/aarch64/inst.isle f946561093de4ff5
src/prelude.isle 2bfcafbef6b29358
src/isa/aarch64/inst.isle 944323ff7d6db098
src/isa/aarch64/lower.isle 2d2e1e076a0c8a23

365
cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.rs

File diff suppressed because it is too large

14
cranelift/codegen/src/isa/s390x/inst.isle

@ -1290,15 +1290,6 @@
;; Instruction creation helpers ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Emit an instruction.
;;
;; This is low-level and side-effectful; it should only be used as an
;; implementation detail by helpers that preserve the SSA facade themselves.
(decl emit (MInst) Unit)
(extern constructor emit emit)
(decl emit_safepoint (MInst) Unit)
(extern constructor emit_safepoint emit_safepoint)
;; Helper for emitting `MInst.AluRRR` instructions.
(decl alu_rrr (Type ALUOp Reg Reg) Reg)
(rule (alu_rrr ty op src1 src2)
@ -2195,11 +2186,6 @@
(rule (debugtrap_impl)
(SideEffectNoResult.Inst (MInst.Debugtrap)))
(decl safepoint (SideEffectNoResult) ValueRegs)
(rule (safepoint (SideEffectNoResult.Inst inst))
(let ((_ Unit (emit_safepoint inst)))
(value_regs_invalid)))
;; Helpers for handling boolean conditions ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

4
cranelift/codegen/src/isa/s390x/lower/isle/generated_code.manifest

@ -1,4 +1,4 @@
src/clif.isle 9ea75a6f790b5c03
src/prelude.isle 51d2aef2566c1c96
src/isa/s390x/inst.isle d7bfd05fb4d4a66d
src/prelude.isle 2bfcafbef6b29358
src/isa/s390x/inst.isle 1d525c87f7c77c26
src/isa/s390x/lower.isle 57dcc39cbab2d1c6

884
cranelift/codegen/src/isa/s390x/lower/isle/generated_code.rs

File diff suppressed because it is too large

7
cranelift/codegen/src/isa/x64/inst.isle

@ -613,13 +613,6 @@
;; maintain the invariant that each temporary register they allocate and define
;; only gets defined the once.
;; Emit an instruction.
;;
;; This is low-level and side-effectful; it should only be used as an
;; implementation detail by helpers that preserve the SSA facade themselves.
(decl emit (MInst) Unit)
(extern constructor emit emit)
;; Helper for emitting `MInst.AluRmiR` instructions.
(decl alu_rmi_r (Type AluRmiROpcode Reg RegMemImm) Reg)
(rule (alu_rmi_r ty opcode src1 src2)

4
cranelift/codegen/src/isa/x64/lower/isle.rs

@ -231,6 +231,10 @@ where
}
}
fn emit_safepoint(&mut self, _inst: &MInst) -> Unit {
unimplemented!();
}
#[inline]
fn nonzero_u64_fits_in_u32(&mut self, x: u64) -> Option<u64> {
if x != 0 && x < u64::from(u32::MAX) {

4
cranelift/codegen/src/isa/x64/lower/isle/generated_code.manifest

@ -1,4 +1,4 @@
src/clif.isle 9ea75a6f790b5c03
src/prelude.isle 51d2aef2566c1c96
src/isa/x64/inst.isle 61004acbb1289816
src/prelude.isle 2bfcafbef6b29358
src/isa/x64/inst.isle bbb6a3d201200cc8
src/isa/x64/lower.isle 82db7f7d47ac7809

297
cranelift/codegen/src/isa/x64/lower/isle/generated_code.rs

File diff suppressed because it is too large

19
cranelift/codegen/src/prelude.isle

@ -277,6 +277,19 @@
(extractor (u64_from_iconst x)
(def_inst (iconst (u64_from_imm64 x))))
;; Instruction creation helpers ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Emit an instruction.
;;
;; This is low-level and side-effectful; it should only be used as an
;; implementation detail by helpers that preserve the SSA facade themselves.
(decl emit (MInst) Unit)
(extern constructor emit emit)
(decl emit_safepoint (MInst) Unit)
(extern constructor emit_safepoint emit_safepoint)
;;;; Helpers for Side-Effectful Instructions Without Results ;;;;;;;;;;;;;;;;;;;
(type SideEffectNoResult (enum (Inst (inst MInst))))
@ -288,6 +301,12 @@
(let ((_ Unit (emit inst)))
(value_regs_invalid)))
;; Similarly, but emit the side-effectful instruction as a safepoint.
(decl safepoint (SideEffectNoResult) ValueRegs)
(rule (safepoint (SideEffectNoResult.Inst inst))
(let ((_ Unit (emit_safepoint inst)))
(value_regs_invalid)))
;;;; Helpers for Working with Flags ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Newtype wrapper around `MInst` for instructions that are used for their

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