aarch64: Test instruction selection for `bmask` (#5396)

I copied the `bmask` precise-output tests from x64 and used
CRANELIFT_TEST_BLESS=1 to generate this test.

I don't know aarch64 well enough to decide if this output is correct.
However, for I128 it is identical to the previous I128-only
precise-output tests, and the existing runtests for bmask pass on
aarch64, so I think it's likely correct.

cranelift/filetests/filetests/isa/aarch64/bmask.clif

@@ -0,0 +1,299 @@
+test compile precise-output
+target aarch64
+
+
+function %bmask_i64_i64(i64) -> i64 {
+block0(v0: i64):
+  v1 = bmask.i64 v0
+  return v1
+}
+
+; block0:
+;   subs xzr, x0, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i64_i32(i64) -> i32 {
+block0(v0: i64):
+  v1 = bmask.i32 v0
+  return v1
+}
+
+; block0:
+;   subs xzr, x0, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i64_i16(i64) -> i16 {
+block0(v0: i64):
+  v1 = bmask.i16 v0
+  return v1
+}
+
+; block0:
+;   subs xzr, x0, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i64_i8(i64) -> i8 {
+block0(v0: i64):
+  v1 = bmask.i8 v0
+  return v1
+}
+
+; block0:
+;   subs xzr, x0, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i32_i64(i32) -> i64 {
+block0(v0: i32):
+  v1 = bmask.i64 v0
+  return v1
+}
+
+; block0:
+;   subs wzr, w0, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i32_i32(i32) -> i32 {
+block0(v0: i32):
+  v1 = bmask.i32 v0
+  return v1
+}
+
+; block0:
+;   subs wzr, w0, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i32_i16(i32) -> i16 {
+block0(v0: i32):
+  v1 = bmask.i16 v0
+  return v1
+}
+
+; block0:
+;   subs wzr, w0, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i32_i8(i32) -> i8 {
+block0(v0: i32):
+  v1 = bmask.i8 v0
+  return v1
+}
+
+; block0:
+;   subs wzr, w0, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i16_i64(i16) -> i64 {
+block0(v0: i16):
+  v1 = bmask.i64 v0
+  return v1
+}
+
+; block0:
+;   and w2, w0, #65535
+;   subs wzr, w2, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i16_i32(i16) -> i32 {
+block0(v0: i16):
+  v1 = bmask.i32 v0
+  return v1
+}
+
+; block0:
+;   and w2, w0, #65535
+;   subs wzr, w2, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i16_i16(i16) -> i16 {
+block0(v0: i16):
+  v1 = bmask.i16 v0
+  return v1
+}
+
+; block0:
+;   and w2, w0, #65535
+;   subs wzr, w2, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i16_i8(i16) -> i8 {
+block0(v0: i16):
+  v1 = bmask.i8 v0
+  return v1
+}
+
+; block0:
+;   and w2, w0, #65535
+;   subs wzr, w2, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i8_i64(i8) -> i64 {
+block0(v0: i8):
+  v1 = bmask.i64 v0
+  return v1
+}
+
+; block0:
+;   and w2, w0, #255
+;   subs wzr, w2, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i8_i32(i8) -> i32 {
+block0(v0: i8):
+  v1 = bmask.i32 v0
+  return v1
+}
+
+; block0:
+;   and w2, w0, #255
+;   subs wzr, w2, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i8_i16(i8) -> i16 {
+block0(v0: i8):
+  v1 = bmask.i16 v0
+  return v1
+}
+
+; block0:
+;   and w2, w0, #255
+;   subs wzr, w2, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i8_i8(i8) -> i8 {
+block0(v0: i8):
+  v1 = bmask.i8 v0
+  return v1
+}
+
+; block0:
+;   and w2, w0, #255
+;   subs wzr, w2, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i128_i128(i128) -> i128 {
+block0(v0: i128):
+  v1 = bmask.i128 v0
+  return v1
+}
+
+; block0:
+;   orr x3, x0, x1
+;   subs xzr, x3, #0
+;   csetm x1, ne
+;   mov x0, x1
+;   ret
+
+function %bmask_i128_i64(i128) -> i64 {
+block0(v0: i128):
+  v1 = bmask.i64 v0
+  return v1
+}
+
+; block0:
+;   orr x3, x0, x1
+;   subs xzr, x3, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i128_i32(i128) -> i32 {
+block0(v0: i128):
+  v1 = bmask.i32 v0
+  return v1
+}
+
+; block0:
+;   orr x3, x0, x1
+;   subs xzr, x3, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i128_i16(i128) -> i16 {
+block0(v0: i128):
+  v1 = bmask.i16 v0
+  return v1
+}
+
+; block0:
+;   orr x3, x0, x1
+;   subs xzr, x3, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i128_i8(i128) -> i8 {
+block0(v0: i128):
+  v1 = bmask.i8 v0
+  return v1
+}
+
+; block0:
+;   orr x3, x0, x1
+;   subs xzr, x3, #0
+;   csetm x0, ne
+;   ret
+
+function %bmask_i64_i128(i64) -> i128 {
+block0(v0: i64):
+  v1 = bmask.i128 v0
+  return v1
+}
+
+; block0:
+;   subs xzr, x0, #0
+;   csetm x1, ne
+;   mov x0, x1
+;   ret
+
+function %bmask_i32_i128(i32) -> i128 {
+block0(v0: i32):
+  v1 = bmask.i128 v0
+  return v1
+}
+
+; block0:
+;   subs wzr, w0, #0
+;   csetm x1, ne
+;   mov x0, x1
+;   ret
+
+function %bmask_i16_i128(i16) -> i128 {
+block0(v0: i16):
+  v1 = bmask.i128 v0
+  return v1
+}
+
+; block0:
+;   and w2, w0, #65535
+;   subs wzr, w2, #0
+;   csetm x1, ne
+;   mov x0, x1
+;   ret
+
+function %bmask_i8_i128(i8) -> i128 {
+block0(v0: i8):
+  v1 = bmask.i128 v0
+  return v1
+}
+
+; block0:
+;   and w2, w0, #255
+;   subs wzr, w2, #0
+;   csetm x1, ne
+;   mov x0, x1
+;   ret
+

cranelift/filetests/filetests/isa/aarch64/i128-bmask.clif

@@ -1,114 +0,0 @@
-test compile precise-output
-target aarch64
-
-function %bmask_i128_i128(i128) -> i128 {
-block0(v0: i128):
-  v1 = bmask.i128 v0
-  return v1
-}
-
-; block0:
-;   orr x3, x0, x1
-;   subs xzr, x3, #0
-;   csetm x1, ne
-;   mov x0, x1
-;   ret
-
-function %bmask_i128_i64(i128) -> i64 {
-block0(v0: i128):
-  v1 = bmask.i64 v0
-  return v1
-}
-
-; block0:
-;   orr x3, x0, x1
-;   subs xzr, x3, #0
-;   csetm x0, ne
-;   ret
-
-function %bmask_i128_i32(i128) -> i32 {
-block0(v0: i128):
-  v1 = bmask.i32 v0
-  return v1
-}
-
-; block0:
-;   orr x3, x0, x1
-;   subs xzr, x3, #0
-;   csetm x0, ne
-;   ret
-
-function %bmask_i128_i16(i128) -> i16 {
-block0(v0: i128):
-  v1 = bmask.i16 v0
-  return v1
-}
-
-; block0:
-;   orr x3, x0, x1
-;   subs xzr, x3, #0
-;   csetm x0, ne
-;   ret
-
-function %bmask_i128_i8(i128) -> i8 {
-block0(v0: i128):
-  v1 = bmask.i8 v0
-  return v1
-}
-
-; block0:
-;   orr x3, x0, x1
-;   subs xzr, x3, #0
-;   csetm x0, ne
-;   ret
-
-function %bmask_i64_i128(i64) -> i128 {
-block0(v0: i64):
-  v1 = bmask.i128 v0
-  return v1
-}
-
-; block0:
-;   subs xzr, x0, #0
-;   csetm x1, ne
-;   mov x0, x1
-;   ret
-
-function %bmask_i32_i128(i32) -> i128 {
-block0(v0: i32):
-  v1 = bmask.i128 v0
-  return v1
-}
-
-; block0:
-;   subs wzr, w0, #0
-;   csetm x1, ne
-;   mov x0, x1
-;   ret
-
-function %bmask_i16_i128(i16) -> i128 {
-block0(v0: i16):
-  v1 = bmask.i128 v0
-  return v1
-}
-
-; block0:
-;   and w2, w0, #65535
-;   subs wzr, w2, #0
-;   csetm x1, ne
-;   mov x0, x1
-;   ret
-
-function %bmask_i8_i128(i8) -> i128 {
-block0(v0: i8):
-  v1 = bmask.i128 v0
-  return v1
-}
-
-; block0:
-;   and w2, w0, #255
-;   subs wzr, w2, #0
-;   csetm x1, ne
-;   mov x0, x1
-;   ret
-