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riscv64: Rollback isub lhs optimization (#7491)

pull/7499/head
Afonso Bordado 1 year ago
committed by GitHub
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7aebb922af
commit
a6e559aaae
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2 changed files with 42 additions and 38 deletions
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  1. 72
      cranelift/codegen/src/isa/riscv64/lower.isle
  2. 8
      cranelift/filetests/filetests/runtests/arithmetic.clif

72
cranelift/codegen/src/isa/riscv64/lower.isle
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@ -329,111 +329,107 @@
(if-let imm12_neg (imm12_from_negated_value y))
(alu_rr_imm12 (select_addi ty) x imm12_neg))
(rule 4 (lower (has_type (ty_int_ref_scalar_64 ty) (isub x y)))
(if-let imm12_neg (imm12_from_negated_value x))
(alu_rr_imm12 (select_addi ty) y imm12_neg))
;; SIMD Vectors
(rule 5 (lower (has_type (ty_vec_fits_in_register ty) (isub x y)))
(rule 4 (lower (has_type (ty_vec_fits_in_register ty) (isub x y)))
(rv_vsub_vv x y (unmasked) ty))
(rule 6 (lower (has_type (ty_vec_fits_in_register ty) (isub x (splat y))))
(rule 5 (lower (has_type (ty_vec_fits_in_register ty) (isub x (splat y))))
(rv_vsub_vx x y (unmasked) ty))
(rule 7 (lower (has_type (ty_vec_fits_in_register ty) (isub x (splat (sextend y @ (value_type sext_ty))))))
(rule 6 (lower (has_type (ty_vec_fits_in_register ty) (isub x (splat (sextend y @ (value_type sext_ty))))))
(if-let half_ty (ty_half_width ty))
(if-let $true (ty_equal (lane_type half_ty) sext_ty))
(rv_vwsub_wx x y (unmasked) (vstate_mf2 half_ty)))
(rule 7 (lower (has_type (ty_vec_fits_in_register ty) (isub x (splat (uextend y @ (value_type uext_ty))))))
(rule 6 (lower (has_type (ty_vec_fits_in_register ty) (isub x (splat (uextend y @ (value_type uext_ty))))))
(if-let half_ty (ty_half_width ty))
(if-let $true (ty_equal (lane_type half_ty) uext_ty))
(rv_vwsubu_wx x y (unmasked) (vstate_mf2 half_ty)))
(rule 8 (lower (has_type (ty_vec_fits_in_register ty) (isub (splat x) y)))
(rule 7 (lower (has_type (ty_vec_fits_in_register ty) (isub (splat x) y)))
(rv_vrsub_vx y x (unmasked) ty))
(rule 9 (lower (has_type (ty_vec_fits_in_register ty) (isub x y)))
(rule 8 (lower (has_type (ty_vec_fits_in_register ty) (isub x y)))
(if-let x_imm (replicated_imm5 x))
(rv_vrsub_vi y x_imm (unmasked) ty))
;; Signed Widening Low Subtractions
(rule 7 (lower (has_type (ty_vec_fits_in_register _) (isub x (swiden_low y @ (value_type in_ty)))))
(rule 6 (lower (has_type (ty_vec_fits_in_register _) (isub x (swiden_low y @ (value_type in_ty)))))
(rv_vwsub_wv x y (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))
(rule 10 (lower (has_type (ty_vec_fits_in_register _) (isub (swiden_low x @ (value_type in_ty))
(swiden_low y))))
(rule 9 (lower (has_type (ty_vec_fits_in_register _) (isub (swiden_low x @ (value_type in_ty))
(swiden_low y))))
(rv_vwsub_vv x y (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))
(rule 10 (lower (has_type (ty_vec_fits_in_register _) (isub (swiden_low x @ (value_type in_ty))
(splat (sextend y @ (value_type sext_ty))))))
(rule 9 (lower (has_type (ty_vec_fits_in_register _) (isub (swiden_low x @ (value_type in_ty))
(splat (sextend y @ (value_type sext_ty))))))
(if-let $true (ty_equal (lane_type in_ty) sext_ty))
(rv_vwsub_vx x y (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))
;; Signed Widening High Subtractions
;; These are the same as the low widenings, but we first slide down the inputs.
(rule 7 (lower (has_type (ty_vec_fits_in_register _) (isub x (swiden_high y @ (value_type in_ty)))))
(rule 6 (lower (has_type (ty_vec_fits_in_register _) (isub x (swiden_high y @ (value_type in_ty)))))
(rv_vwsub_wv x (gen_slidedown_half in_ty y) (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))
(rule 10 (lower (has_type (ty_vec_fits_in_register _) (isub (swiden_high x @ (value_type in_ty))
(swiden_high y))))
(rule 9 (lower (has_type (ty_vec_fits_in_register _) (isub (swiden_high x @ (value_type in_ty))
(swiden_high y))))
(rv_vwsub_vv (gen_slidedown_half in_ty x) (gen_slidedown_half in_ty y) (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))
(rule 10 (lower (has_type (ty_vec_fits_in_register _) (isub (swiden_high x @ (value_type in_ty))
(splat (sextend y @ (value_type sext_ty))))))
(rule 9 (lower (has_type (ty_vec_fits_in_register _) (isub (swiden_high x @ (value_type in_ty))
(splat (sextend y @ (value_type sext_ty))))))
(if-let $true (ty_equal (lane_type in_ty) sext_ty))
(rv_vwsub_vx (gen_slidedown_half in_ty x) y (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))
;; Unsigned Widening Low Subtractions
(rule 7 (lower (has_type (ty_vec_fits_in_register _) (isub x (uwiden_low y @ (value_type in_ty)))))
(rule 6 (lower (has_type (ty_vec_fits_in_register _) (isub x (uwiden_low y @ (value_type in_ty)))))
(rv_vwsubu_wv x y (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))
(rule 10 (lower (has_type (ty_vec_fits_in_register _) (isub (uwiden_low x @ (value_type in_ty))
(uwiden_low y))))
(rule 9 (lower (has_type (ty_vec_fits_in_register _) (isub (uwiden_low x @ (value_type in_ty))
(uwiden_low y))))
(rv_vwsubu_vv x y (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))
(rule 10 (lower (has_type (ty_vec_fits_in_register _) (isub (uwiden_low x @ (value_type in_ty))
(splat (uextend y @ (value_type uext_ty))))))
(rule 9 (lower (has_type (ty_vec_fits_in_register _) (isub (uwiden_low x @ (value_type in_ty))
(splat (uextend y @ (value_type uext_ty))))))
(if-let $true (ty_equal (lane_type in_ty) uext_ty))
(rv_vwsubu_vx x y (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))
;; Unsigned Widening High Subtractions
;; These are the same as the low widenings, but we first slide down the inputs.
(rule 7 (lower (has_type (ty_vec_fits_in_register _) (isub x (uwiden_high y @ (value_type in_ty)))))
(rule 6 (lower (has_type (ty_vec_fits_in_register _) (isub x (uwiden_high y @ (value_type in_ty)))))
(rv_vwsubu_wv x (gen_slidedown_half in_ty y) (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))
(rule 10 (lower (has_type (ty_vec_fits_in_register _) (isub (uwiden_high x @ (value_type in_ty))
(uwiden_high y))))
(rule 9 (lower (has_type (ty_vec_fits_in_register _) (isub (uwiden_high x @ (value_type in_ty))
(uwiden_high y))))
(rv_vwsubu_vv (gen_slidedown_half in_ty x) (gen_slidedown_half in_ty y) (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))
(rule 10 (lower (has_type (ty_vec_fits_in_register _) (isub (uwiden_high x @ (value_type in_ty))
(splat (uextend y @ (value_type uext_ty))))))
(rule 9 (lower (has_type (ty_vec_fits_in_register _) (isub (uwiden_high x @ (value_type in_ty))
(splat (uextend y @ (value_type uext_ty))))))
(if-let $true (ty_equal (lane_type in_ty) uext_ty))
(rv_vwsubu_vx (gen_slidedown_half in_ty x) y (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))
;; Signed Widening Mixed High/Low Subtractions
(rule 10 (lower (has_type (ty_vec_fits_in_register _) (isub (swiden_low x @ (value_type in_ty))
(swiden_high y))))
(rule 9 (lower (has_type (ty_vec_fits_in_register _) (isub (swiden_low x @ (value_type in_ty))
(swiden_high y))))
(rv_vwsub_vv x (gen_slidedown_half in_ty y) (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))
(rule 10 (lower (has_type (ty_vec_fits_in_register _) (isub (swiden_high x @ (value_type in_ty))
(swiden_low y))))
(rule 9 (lower (has_type (ty_vec_fits_in_register _) (isub (swiden_high x @ (value_type in_ty))
(swiden_low y))))
(rv_vwsub_vv (gen_slidedown_half in_ty x) y (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))
;; Unsigned Widening Mixed High/Low Subtractions
(rule 10 (lower (has_type (ty_vec_fits_in_register _) (isub (uwiden_low x @ (value_type in_ty))
(uwiden_high y))))
(rule 9 (lower (has_type (ty_vec_fits_in_register _) (isub (uwiden_low x @ (value_type in_ty))
(uwiden_high y))))
(rv_vwsubu_vv x (gen_slidedown_half in_ty y) (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))
(rule 10 (lower (has_type (ty_vec_fits_in_register _) (isub (uwiden_high x @ (value_type in_ty))
(uwiden_low y))))
(rule 9 (lower (has_type (ty_vec_fits_in_register _) (isub (uwiden_high x @ (value_type in_ty))
(uwiden_low y))))
(rv_vwsubu_vv (gen_slidedown_half in_ty x) y (unmasked) (vstate_mf2 (ty_half_lanes in_ty))))

8
cranelift/filetests/filetests/runtests/arithmetic.clif
View File

@ -127,6 +127,14 @@ block0(v0: i8,v1: i8):
; run: %sub_i8(0xAB, 0x0B) == 0xA0
; run: %sub_i8(0xC0, 0xDE) == 0xE2
function %isub_const_lhs(i8, i32) -> i32 {
block0(v0: i8, v1: i32):
v376 = iconst.i32 0xffff_fffd
v1161 = isub v376, v1
return v1161
}
; run: %isub_const_lhs(68, 4474) == -4477
function %mul_i64(i64, i64) -> i64 {
block0(v0: i64,v1: i64):

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