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All instructions using the CPU flags types (IFLAGS/FFLAGS) were already removed. This patch completes the cleanup by removing all remaining instructions that define values of CPU flags types, as well as the types themselves. Specifically, the following features are removed: - The IFLAGS and FFLAGS types and the SpecialType category. - Special handling of IFLAGS and FFLAGS in machinst/isle.rs and machinst/lower.rs. - The ifcmp, ifcmp_imm, ffcmp, iadd_ifcin, iadd_ifcout, iadd_ifcarry, isub_ifbin, isub_ifbout, and isub_ifborrow instructions. - The writes_cpu_flags instruction property. - The flags verifier pass. - Flags handling in the interpreter. All of these features are currently unused; no functional change intended by this patch. This addresses https://github.com/bytecodealliance/wasmtime/issues/3249.pull/5352/merge
Ulrich Weigand
2 years ago
committed by
GitHub
GitHub
42 changed files with 55 additions and 1119 deletions
@ -1,161 +0,0 @@ |
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//! Verify CPU flags values.
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use crate::entity::{EntitySet, SecondaryMap}; |
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use crate::flowgraph::{BlockPredecessor, ControlFlowGraph}; |
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use crate::ir; |
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use crate::ir::instructions::BranchInfo; |
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use crate::packed_option::PackedOption; |
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use crate::timing; |
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use crate::verifier::{VerifierErrors, VerifierStepResult}; |
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/// Verify that CPU flags are used correctly.
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///
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/// The value types `iflags` and `fflags` represent CPU flags which usually live in a
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/// special-purpose register, so they can't be used as freely as other value types that can live in
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/// any register.
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///
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/// We verify the following conditions:
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///
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/// - At most one flags value can be live at a time.
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/// - A flags value can not be live across an instruction that clobbers the flags.
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///
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///
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pub fn verify_flags( |
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func: &ir::Function, |
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cfg: &ControlFlowGraph, |
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errors: &mut VerifierErrors, |
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) -> VerifierStepResult<()> { |
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let _tt = timing::verify_flags(); |
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let mut verifier = FlagsVerifier { |
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func, |
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cfg, |
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livein: SecondaryMap::new(), |
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}; |
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verifier.check(errors) |
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} |
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struct FlagsVerifier<'a> { |
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func: &'a ir::Function, |
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cfg: &'a ControlFlowGraph, |
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/// The single live-in flags value (if any) for each block.
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livein: SecondaryMap<ir::Block, PackedOption<ir::Value>>, |
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} |
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impl<'a> FlagsVerifier<'a> { |
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fn check(&mut self, errors: &mut VerifierErrors) -> VerifierStepResult<()> { |
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// List of blocks that need to be processed. blocks may be re-added to this list when we detect
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// that one of their successor blocks needs a live-in flags value.
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let mut worklist = EntitySet::with_capacity(self.func.layout.block_capacity()); |
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for block in self.func.layout.blocks() { |
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worklist.insert(block); |
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} |
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while let Some(block) = worklist.pop() { |
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if let Some(value) = self.visit_block(block, errors)? { |
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// The block has live-in flags. Check if the value changed.
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match self.livein[block].expand() { |
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// Revisit any predecessor blocks the first time we see a live-in for `block`.
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None => { |
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self.livein[block] = value.into(); |
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for BlockPredecessor { block: pred, .. } in self.cfg.pred_iter(block) { |
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worklist.insert(pred); |
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} |
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} |
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Some(old) if old != value => { |
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return errors.fatal(( |
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block, |
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format!("conflicting live-in CPU flags: {} and {}", old, value), |
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)); |
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} |
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x => assert_eq!(x, Some(value)), |
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} |
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} else { |
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// Existing live-in flags should never be able to disappear.
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assert_eq!(self.livein[block].expand(), None); |
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} |
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} |
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Ok(()) |
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} |
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/// Check flags usage in `block` and return the live-in flags value, if any.
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fn visit_block( |
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&self, |
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block: ir::Block, |
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errors: &mut VerifierErrors, |
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) -> VerifierStepResult<Option<ir::Value>> { |
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// The single currently live flags value.
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let mut live_val = None; |
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// Visit instructions backwards so we can track liveness accurately.
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for inst in self.func.layout.block_insts(block).rev() { |
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// Check if `inst` interferes with existing live flags.
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if let Some(live) = live_val { |
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for &res in self.func.dfg.inst_results(inst) { |
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if res == live { |
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// We've reached the def of `live_flags`, so it is no longer live above.
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live_val = None; |
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} else if self.func.dfg.value_type(res).is_flags() { |
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errors |
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.report((inst, format!("{} clobbers live CPU flags in {}", res, live))); |
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return Err(()); |
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} |
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} |
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} |
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// Now look for live ranges of CPU flags that end here.
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for &arg in self.func.dfg.inst_args(inst) { |
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if self.func.dfg.value_type(arg).is_flags() { |
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merge(&mut live_val, arg, inst, errors)?; |
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} |
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} |
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// Include live-in flags to successor blocks.
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match self.func.dfg.analyze_branch(inst) { |
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BranchInfo::NotABranch => {} |
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BranchInfo::SingleDest(dest, _) => { |
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if let Some(val) = self.livein[dest].expand() { |
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merge(&mut live_val, val, inst, errors)?; |
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} |
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} |
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BranchInfo::Table(jt, dest) => { |
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if let Some(dest) = dest { |
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if let Some(val) = self.livein[dest].expand() { |
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merge(&mut live_val, val, inst, errors)?; |
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} |
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} |
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for dest in self.func.jump_tables[jt].iter() { |
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if let Some(val) = self.livein[*dest].expand() { |
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merge(&mut live_val, val, inst, errors)?; |
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} |
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} |
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} |
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} |
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} |
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// Return the required live-in flags value.
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Ok(live_val) |
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} |
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} |
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// Merge live flags values, or return an error on conflicting values.
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fn merge( |
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a: &mut Option<ir::Value>, |
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b: ir::Value, |
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inst: ir::Inst, |
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errors: &mut VerifierErrors, |
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) -> VerifierStepResult<()> { |
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if let Some(va) = *a { |
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if b != va { |
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return errors.fatal(( |
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inst, |
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format!("conflicting live CPU flags: {} and {}", va, b), |
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)); |
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} |
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} else { |
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*a = Some(b); |
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} |
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Ok(()) |
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} |
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@ -1,24 +1,31 @@ |
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test cat |
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test verifier |
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function %select(i32, i32, i32) -> i32 { |
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block1(v1: i32, v2: i32, v3: i32): |
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v10 = select v1, v2, v3 |
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;check: v10 = select v1, v2, v3 |
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return v10 |
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} |
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function %add_i96(i32, i32, i32, i32, i32, i32) -> i32, i32, i32 { |
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block1(v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32): |
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v10, v11 = iadd_ifcout v1, v4 |
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;check: v10, v11 = iadd_ifcout v1, v4 |
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v20, v21 = iadd_ifcarry v2, v5, v11 |
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; check: v20, v21 = iadd_ifcarry v2, v5, v11 |
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v30 = iadd_ifcin v3, v6, v21 |
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; check: v30 = iadd_ifcin v3, v6, v21 |
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v10, v11 = iadd_cout v1, v4 |
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;check: v10, v11 = iadd_cout v1, v4 |
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v20, v21 = iadd_carry v2, v5, v11 |
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; check: v20, v21 = iadd_carry v2, v5, v11 |
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v30 = iadd_cin v3, v6, v21 |
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; check: v30 = iadd_cin v3, v6, v21 |
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return v10, v20, v30 |
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} |
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function %sub_i96(i32, i32, i32, i32, i32, i32) -> i32, i32, i32 { |
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block1(v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32): |
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v10, v11 = isub_ifbout v1, v4 |
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;check: v10, v11 = isub_ifbout v1, v4 |
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v20, v21 = isub_ifborrow v2, v5, v11 |
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; check: v20, v21 = isub_ifborrow v2, v5, v11 |
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v30 = isub_ifbin v3, v6, v21 |
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; check: v30 = isub_ifbin v3, v6, v21 |
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v10, v11 = isub_bout v1, v4 |
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;check: v10, v11 = isub_bout v1, v4 |
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v20, v21 = isub_borrow v2, v5, v11 |
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; check: v20, v21 = isub_borrow v2, v5, v11 |
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v30 = isub_bin v3, v6, v21 |
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; check: v30 = isub_bin v3, v6, v21 |
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return v10, v20, v30 |
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} |
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