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707 lines
22 KiB
707 lines
22 KiB
10 years ago
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//*****************************************************************************
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//
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// gpio.c
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//
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// Driver for the GPIO module.
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//
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// Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
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//
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! \addtogroup GPIO_General_Purpose_InputOutput_api
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//! @{
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//
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//*****************************************************************************
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#include "inc/hw_types.h"
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#include "inc/hw_gpio.h"
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#include "inc/hw_ints.h"
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#include "inc/hw_memmap.h"
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#include "inc/hw_common_reg.h"
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#include "debug.h"
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#include "gpio.h"
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#include "interrupt.h"
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//*****************************************************************************
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//
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//! \internal
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//! Checks a GPIO base address.
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//!
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//! \param ulPort is the base address of the GPIO port.
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//!
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//! This function determines if a GPIO port base address is valid.
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//!
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//! \return Returns \b true if the base address is valid and \b false
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//! otherwise.
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//
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//*****************************************************************************
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#if defined(DEBUG) && !defined(BOOTLOADER)
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static tBoolean
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GPIOBaseValid(unsigned long ulPort)
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{
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return((ulPort == GPIOA0_BASE) ||
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(ulPort == GPIOA1_BASE) ||
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(ulPort == GPIOA2_BASE) ||
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(ulPort == GPIOA3_BASE) ||
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(ulPort == GPIOA4_BASE));
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}
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#else
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#define GPIOBaseValid(ulPort) (ulPort)
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#endif
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//*****************************************************************************
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//
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//! \internal
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//! Gets the GPIO interrupt number.
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//!
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//! \param ulPort is the base address of the GPIO port.
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//!
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//! Given a GPIO base address, returns the corresponding interrupt number.
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//!
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//! \return Returns a GPIO interrupt number, or -1 if \e ulPort is invalid.
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//
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//*****************************************************************************
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static long
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GPIOGetIntNumber(unsigned long ulPort)
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{
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unsigned int ulInt;
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//
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// Determine the GPIO interrupt number for the given module.
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//
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switch(ulPort)
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{
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case GPIOA0_BASE:
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{
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ulInt = INT_GPIOA0;
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break;
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}
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case GPIOA1_BASE:
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{
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ulInt = INT_GPIOA1;
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break;
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}
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case GPIOA2_BASE:
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{
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ulInt = INT_GPIOA2;
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break;
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}
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case GPIOA3_BASE:
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{
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ulInt = INT_GPIOA3;
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break;
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}
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default:
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{
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return(-1);
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}
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}
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//
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// Return GPIO interrupt number.
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//
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return(ulInt);
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}
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//*****************************************************************************
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//
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//! Sets the direction and mode of the specified pin(s).
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//!
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//! \param ulPort is the base address of the GPIO port
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//! \param ucPins is the bit-packed representation of the pin(s).
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//! \param ulPinIO is the pin direction and/or mode.
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//!
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//! This function will set the specified pin(s) on the selected GPIO port
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//! as either an input or output under software control, or it will set the
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//! pin to be under hardware control.
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//!
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//! The parameter \e ulPinIO is an enumerated data type that can be one of
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//! the following values:
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//!
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//! - \b GPIO_DIR_MODE_IN
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//! - \b GPIO_DIR_MODE_OUT
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//!
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//! where \b GPIO_DIR_MODE_IN specifies that the pin will be programmed as
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//! a software controlled input, \b GPIO_DIR_MODE_OUT specifies that the pin
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//! will be programmed as a software controlled output.
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//!
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//! The pin(s) are specified using a bit-packed byte, where each bit that is
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//! set identifies the pin to be accessed, and where bit 0 of the byte
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//! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
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//!
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//! \note GPIOPadConfigSet() must also be used to configure the corresponding
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//! pad(s) in order for them to propagate the signal to/from the GPIO.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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GPIODirModeSet(unsigned long ulPort, unsigned char ucPins,
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unsigned long ulPinIO)
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{
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//
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// Check the arguments.
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//
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ASSERT(GPIOBaseValid(ulPort));
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ASSERT((ulPinIO == GPIO_DIR_MODE_IN) || (ulPinIO == GPIO_DIR_MODE_OUT));
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//
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// Set the pin direction and mode.
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//
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HWREG(ulPort + GPIO_O_GPIO_DIR) = ((ulPinIO & 1) ?
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(HWREG(ulPort + GPIO_O_GPIO_DIR) | ucPins) :
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(HWREG(ulPort + GPIO_O_GPIO_DIR) & ~(ucPins)));
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}
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//*****************************************************************************
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//
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//! Gets the direction and mode of a pin.
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//!
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//! \param ulPort is the base address of the GPIO port.
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//! \param ucPin is the pin number.
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//!
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//! This function gets the direction and control mode for a specified pin on
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//! the selected GPIO port. The pin can be configured as either an input or
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//! output under software control, or it can be under hardware control. The
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//! type of control and direction are returned as an enumerated data type.
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//!
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//! \return Returns one of the enumerated data types described for
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//! GPIODirModeSet().
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//
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//*****************************************************************************
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unsigned long
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GPIODirModeGet(unsigned long ulPort, unsigned char ucPin)
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{
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unsigned long ulDir;
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//
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// Check the arguments.
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//
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ASSERT(GPIOBaseValid(ulPort));
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//
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// Return the pin direction
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//
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ulDir = HWREG(ulPort + GPIO_O_GPIO_DIR);
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return(((ulDir & ucPin) ? 1 : 0));
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}
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//*****************************************************************************
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//
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//! Sets the interrupt type for the specified pin(s).
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//!
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//! \param ulPort is the base address of the GPIO port.
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//! \param ucPins is the bit-packed representation of the pin(s).
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//! \param ulIntType specifies the type of interrupt trigger mechanism.
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//!
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//! This function sets up the various interrupt trigger mechanisms for the
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//! specified pin(s) on the selected GPIO port.
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//!
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//! The parameter \e ulIntType is an enumerated data type that can be one of
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//! the following values:
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//!
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//! - \b GPIO_FALLING_EDGE
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//! - \b GPIO_RISING_EDGE
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//! - \b GPIO_BOTH_EDGES
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//! - \b GPIO_LOW_LEVEL
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//! - \b GPIO_HIGH_LEVEL
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//!
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//! The pin(s) are specified using a bit-packed byte, where each bit that is
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//! set identifies the pin to be accessed, and where bit 0 of the byte
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//! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
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//!
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//! \note In order to avoid any spurious interrupts, the user must
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//! ensure that the GPIO inputs remain stable for the duration of
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//! this function.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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GPIOIntTypeSet(unsigned long ulPort, unsigned char ucPins,
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unsigned long ulIntType)
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{
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//
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// Check the arguments.
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//
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ASSERT(GPIOBaseValid(ulPort));
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ASSERT((ulIntType == GPIO_FALLING_EDGE) ||
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(ulIntType == GPIO_RISING_EDGE) || (ulIntType == GPIO_BOTH_EDGES) ||
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(ulIntType == GPIO_LOW_LEVEL) || (ulIntType == GPIO_HIGH_LEVEL));
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//
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// Set the pin interrupt type.
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//
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HWREG(ulPort + GPIO_O_GPIO_IBE) = ((ulIntType & 1) ?
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(HWREG(ulPort + GPIO_O_GPIO_IBE) | ucPins) :
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(HWREG(ulPort + GPIO_O_GPIO_IBE) & ~(ucPins)));
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HWREG(ulPort + GPIO_O_GPIO_IS) = ((ulIntType & 2) ?
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(HWREG(ulPort + GPIO_O_GPIO_IS) | ucPins) :
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(HWREG(ulPort + GPIO_O_GPIO_IS) & ~(ucPins)));
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HWREG(ulPort + GPIO_O_GPIO_IEV) = ((ulIntType & 4) ?
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(HWREG(ulPort + GPIO_O_GPIO_IEV) | ucPins) :
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(HWREG(ulPort + GPIO_O_GPIO_IEV) & ~(ucPins)));
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}
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//*****************************************************************************
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//
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//! Gets the interrupt type for a pin.
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//!
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//! \param ulPort is the base address of the GPIO port.
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//! \param ucPin is the pin number.
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//!
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//! This function gets the interrupt type for a specified pin on the selected
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//! GPIO port. The pin can be configured as a falling edge, rising edge, or
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//! both edge detected interrupt, or it can be configured as a low level or
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//! high level detected interrupt. The type of interrupt detection mechanism
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//! is returned as an enumerated data type.
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//!
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//! \return Returns one of the enumerated data types described for
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//! GPIOIntTypeSet().
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//
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//*****************************************************************************
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unsigned long
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GPIOIntTypeGet(unsigned long ulPort, unsigned char ucPin)
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{
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unsigned long ulIBE, ulIS, ulIEV;
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//
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// Check the arguments.
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//
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ASSERT(GPIOBaseValid(ulPort));
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//
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// Return the pin interrupt type.
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//
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ulIBE = HWREG(ulPort + GPIO_O_GPIO_IBE);
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ulIS = HWREG(ulPort + GPIO_O_GPIO_IS);
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ulIEV = HWREG(ulPort + GPIO_O_GPIO_IEV);
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return(((ulIBE & ucPin) ? 1 : 0) | ((ulIS & ucPin) ? 2 : 0) |
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((ulIEV & ucPin) ? 4 : 0));
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}
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//*****************************************************************************
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//
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//! Enables the specified GPIO interrupts.
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//!
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//! \param ulPort is the base address of the GPIO port.
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//! \param ulIntFlags is the bit mask of the interrupt sources to enable.
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//!
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//! This function enables the indicated GPIO interrupt sources. Only the
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//! sources that are enabled can be reflected to the processor interrupt;
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//! disabled sources have no effect on the processor.
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//!
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//! The \e ulIntFlags parameter is the logical OR of any of the following:
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//!
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//! - \b GPIO_INT_DMA - interrupt due to GPIO triggered DMA Done
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//! - \b GPIO_INT_PIN_0 - interrupt due to activity on Pin 0.
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//! - \b GPIO_INT_PIN_1 - interrupt due to activity on Pin 1.
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//! - \b GPIO_INT_PIN_2 - interrupt due to activity on Pin 2.
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//! - \b GPIO_INT_PIN_3 - interrupt due to activity on Pin 3.
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//! - \b GPIO_INT_PIN_4 - interrupt due to activity on Pin 4.
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//! - \b GPIO_INT_PIN_5 - interrupt due to activity on Pin 5.
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//! - \b GPIO_INT_PIN_6 - interrupt due to activity on Pin 6.
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//! - \b GPIO_INT_PIN_7 - interrupt due to activity on Pin 7.
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//!
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//! \return None.
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//
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//*****************************************************************************
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||
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void
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GPIOIntEnable(unsigned long ulPort, unsigned long ulIntFlags)
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{
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//
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// Check the arguments.
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||
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//
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ASSERT(GPIOBaseValid(ulPort));
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//
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// Enable the interrupts.
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//
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HWREG(ulPort + GPIO_O_GPIO_IM) |= ulIntFlags;
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}
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//*****************************************************************************
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//
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||
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//! Disables the specified GPIO interrupts.
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||
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//!
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//! \param ulPort is the base address of the GPIO port.
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||
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//! \param ulIntFlags is the bit mask of the interrupt sources to disable.
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||
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//!
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//! This function disables the indicated GPIO interrupt sources. Only the
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//! sources that are enabled can be reflected to the processor interrupt;
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||
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//! disabled sources have no effect on the processor.
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||
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//!
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//! The \e ulIntFlags parameter is the logical OR of any of the following:
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//!
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||
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//! - \b GPIO_INT_DMA - interrupt due to GPIO triggered DMA Done
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||
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//! - \b GPIO_INT_PIN_0 - interrupt due to activity on Pin 0.
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||
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//! - \b GPIO_INT_PIN_1 - interrupt due to activity on Pin 1.
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||
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//! - \b GPIO_INT_PIN_2 - interrupt due to activity on Pin 2.
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||
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//! - \b GPIO_INT_PIN_3 - interrupt due to activity on Pin 3.
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||
|
|
//! - \b GPIO_INT_PIN_4 - interrupt due to activity on Pin 4.
|
||
|
|
//! - \b GPIO_INT_PIN_5 - interrupt due to activity on Pin 5.
|
||
|
|
//! - \b GPIO_INT_PIN_6 - interrupt due to activity on Pin 6.
|
||
|
|
//! - \b GPIO_INT_PIN_7 - interrupt due to activity on Pin 7.
|
||
|
|
//!
|
||
|
|
//! \return None.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
void
|
||
|
|
GPIOIntDisable(unsigned long ulPort, unsigned long ulIntFlags)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Check the arguments.
|
||
|
|
//
|
||
|
|
ASSERT(GPIOBaseValid(ulPort));
|
||
|
|
|
||
|
|
//
|
||
|
|
// Disable the interrupts.
|
||
|
|
//
|
||
|
|
HWREG(ulPort + GPIO_O_GPIO_IM) &= ~(ulIntFlags);
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! Gets interrupt status for the specified GPIO port.
|
||
|
|
//!
|
||
|
|
//! \param ulPort is the base address of the GPIO port.
|
||
|
|
//! \param bMasked specifies whether masked or raw interrupt status is
|
||
|
|
//! returned.
|
||
|
|
//!
|
||
|
|
//! If \e bMasked is set as \b true, then the masked interrupt status is
|
||
|
|
//! returned; otherwise, the raw interrupt status will be returned.
|
||
|
|
//!
|
||
|
|
//! \return Returns the current interrupt status, enumerated as a bit field of
|
||
|
|
//! values described in GPIOIntEnable().
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
long
|
||
|
|
GPIOIntStatus(unsigned long ulPort, tBoolean bMasked)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Check the arguments.
|
||
|
|
//
|
||
|
|
ASSERT(GPIOBaseValid(ulPort));
|
||
|
|
|
||
|
|
//
|
||
|
|
// Return the interrupt status.
|
||
|
|
//
|
||
|
|
if(bMasked)
|
||
|
|
{
|
||
|
|
return(HWREG(ulPort + GPIO_O_GPIO_MIS));
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
return(HWREG(ulPort + GPIO_O_GPIO_RIS));
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! Clears the interrupt for the specified pin(s).
|
||
|
|
//!
|
||
|
|
//! \param ulPort is the base address of the GPIO port.
|
||
|
|
//! \param ulIntFlags is a bit mask of the interrupt sources to be cleared.
|
||
|
|
//!
|
||
|
|
//! Clears the interrupt for the specified pin(s).
|
||
|
|
//!
|
||
|
|
//! The \e ulIntFlags parameter has the same definition as the \e ulIntFlags
|
||
|
|
//! parameter to GPIOIntEnable().
|
||
|
|
//!
|
||
|
|
//!
|
||
|
|
//! \return None.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
void
|
||
|
|
GPIOIntClear(unsigned long ulPort, unsigned long ulIntFlags)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Check the arguments.
|
||
|
|
//
|
||
|
|
ASSERT(GPIOBaseValid(ulPort));
|
||
|
|
|
||
|
|
//
|
||
|
|
// Clear the interrupts.
|
||
|
|
//
|
||
|
|
HWREG(ulPort + GPIO_O_GPIO_ICR) = ulIntFlags;
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! Registers an interrupt handler for a GPIO port.
|
||
|
|
//!
|
||
|
|
//! \param ulPort is the base address of the GPIO port.
|
||
|
|
//! \param pfnIntHandler is a pointer to the GPIO port interrupt handling
|
||
|
|
//! function.
|
||
|
|
//!
|
||
|
|
//! This function will ensure that the interrupt handler specified by
|
||
|
|
//! \e pfnIntHandler is called when an interrupt is detected from the selected
|
||
|
|
//! GPIO port. This function will also enable the corresponding GPIO interrupt
|
||
|
|
//! in the interrupt controller; individual pin interrupts and interrupt
|
||
|
|
//! sources must be enabled with GPIOIntEnable().
|
||
|
|
//!
|
||
|
|
//! \sa IntRegister() for important information about registering interrupt
|
||
|
|
//! handlers.
|
||
|
|
//!
|
||
|
|
//! \return None.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
void
|
||
|
|
GPIOIntRegister(unsigned long ulPort, void (*pfnIntHandler)(void))
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Check the arguments.
|
||
|
|
//
|
||
|
|
ASSERT(GPIOBaseValid(ulPort));
|
||
|
|
|
||
|
|
//
|
||
|
|
// Get the interrupt number associated with the specified GPIO.
|
||
|
|
//
|
||
|
|
ulPort = GPIOGetIntNumber(ulPort);
|
||
|
|
|
||
|
|
//
|
||
|
|
// Register the interrupt handler.
|
||
|
|
//
|
||
|
|
IntRegister(ulPort, pfnIntHandler);
|
||
|
|
|
||
|
|
//
|
||
|
|
// Enable the GPIO interrupt.
|
||
|
|
//
|
||
|
|
IntEnable(ulPort);
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! Removes an interrupt handler for a GPIO port.
|
||
|
|
//!
|
||
|
|
//! \param ulPort is the base address of the GPIO port.
|
||
|
|
//!
|
||
|
|
//! This function will unregister the interrupt handler for the specified
|
||
|
|
//! GPIO port. This function will also disable the corresponding
|
||
|
|
//! GPIO port interrupt in the interrupt controller; individual GPIO interrupts
|
||
|
|
//! and interrupt sources must be disabled with GPIOIntDisable().
|
||
|
|
//!
|
||
|
|
//! \sa IntRegister() for important information about registering interrupt
|
||
|
|
//! handlers.
|
||
|
|
//!
|
||
|
|
//! \return None.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
void
|
||
|
|
GPIOIntUnregister(unsigned long ulPort)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Check the arguments.
|
||
|
|
//
|
||
|
|
ASSERT(GPIOBaseValid(ulPort));
|
||
|
|
|
||
|
|
//
|
||
|
|
// Get the interrupt number associated with the specified GPIO.
|
||
|
|
//
|
||
|
|
ulPort = GPIOGetIntNumber(ulPort);
|
||
|
|
|
||
|
|
//
|
||
|
|
// Disable the GPIO interrupt.
|
||
|
|
//
|
||
|
|
IntDisable(ulPort);
|
||
|
|
|
||
|
|
//
|
||
|
|
// Unregister the interrupt handler.
|
||
|
|
//
|
||
|
|
IntUnregister(ulPort);
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! Reads the values present of the specified pin(s).
|
||
|
|
//!
|
||
|
|
//! \param ulPort is the base address of the GPIO port.
|
||
|
|
//! \param ucPins is the bit-packed representation of the pin(s).
|
||
|
|
//!
|
||
|
|
//! The values at the specified pin(s) are read, as specified by \e ucPins.
|
||
|
|
//! Values are returned for both input and output pin(s), and the value
|
||
|
|
//! for pin(s) that are not specified by \e ucPins are set to 0.
|
||
|
|
//!
|
||
|
|
//! The pin(s) are specified using a bit-packed byte, where each bit that is
|
||
|
|
//! set identifies the pin to be accessed, and where bit 0 of the byte
|
||
|
|
//! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
|
||
|
|
//!
|
||
|
|
//! \return Returns a bit-packed byte providing the state of the specified
|
||
|
|
//! pin, where bit 0 of the byte represents GPIO port pin 0, bit 1 represents
|
||
|
|
//! GPIO port pin 1, and so on. Any bit that is not specified by \e ucPins
|
||
|
|
//! is returned as a 0. Bits 31:8 should be ignored.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
long
|
||
|
|
GPIOPinRead(unsigned long ulPort, unsigned char ucPins)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Check the arguments.
|
||
|
|
//
|
||
|
|
ASSERT(GPIOBaseValid(ulPort));
|
||
|
|
|
||
|
|
//
|
||
|
|
// Return the pin value(s).
|
||
|
|
//
|
||
|
|
return(HWREG(ulPort + (GPIO_O_GPIO_DATA + (ucPins << 2))));
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! Writes a value to the specified pin(s).
|
||
|
|
//!
|
||
|
|
//! \param ulPort is the base address of the GPIO port.
|
||
|
|
//! \param ucPins is the bit-packed representation of the pin(s).
|
||
|
|
//! \param ucVal is the value to write to the pin(s).
|
||
|
|
//!
|
||
|
|
//! Writes the corresponding bit values to the output pin(s) specified by
|
||
|
|
//! \e ucPins. Writing to a pin configured as an input pin has no effect.
|
||
|
|
//!
|
||
|
|
//! The pin(s) are specified using a bit-packed byte, where each bit that is
|
||
|
|
//! set identifies the pin to be accessed, and where bit 0 of the byte
|
||
|
|
//! represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on.
|
||
|
|
//!
|
||
|
|
//! \return None.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
void
|
||
|
|
GPIOPinWrite(unsigned long ulPort, unsigned char ucPins, unsigned char ucVal)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Check the arguments.
|
||
|
|
//
|
||
|
|
ASSERT(GPIOBaseValid(ulPort));
|
||
|
|
|
||
|
|
//
|
||
|
|
// Write the pins.
|
||
|
|
//
|
||
|
|
HWREG(ulPort + (GPIO_O_GPIO_DATA + (ucPins << 2))) = ucVal;
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! Enables a GPIO port as a trigger to start a DMA transaction.
|
||
|
|
//!
|
||
|
|
//! \param ulPort is the base address of the GPIO port.
|
||
|
|
//!
|
||
|
|
//! This function enables a GPIO port to be used as a trigger to start a uDMA
|
||
|
|
//! transaction. The GPIO pin will still generate interrupts if the interrupt is
|
||
|
|
//! enabled for the selected pin.
|
||
|
|
//!
|
||
|
|
//! \return None.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
void
|
||
|
|
GPIODMATriggerEnable(unsigned long ulPort)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Check the arguments.
|
||
|
|
//
|
||
|
|
ASSERT(GPIOBaseValid(ulPort));
|
||
|
|
|
||
|
|
//
|
||
|
|
// Set the pin as a DMA trigger.
|
||
|
|
//
|
||
|
|
if(ulPort == GPIOA0_BASE)
|
||
|
|
{
|
||
|
|
HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) |= 0x1;
|
||
|
|
}
|
||
|
|
else if(ulPort == GPIOA1_BASE)
|
||
|
|
{
|
||
|
|
HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) |= 0x2;
|
||
|
|
}
|
||
|
|
else if(ulPort == GPIOA2_BASE)
|
||
|
|
{
|
||
|
|
HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) |= 0x4;
|
||
|
|
}
|
||
|
|
else if(ulPort == GPIOA3_BASE)
|
||
|
|
{
|
||
|
|
HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) |= 0x8;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! Disables a GPIO port as a trigger to start a DMA transaction.
|
||
|
|
//!
|
||
|
|
//! \param ulPort is the base address of the GPIO port.
|
||
|
|
//!
|
||
|
|
//! This function disables a GPIO port to be used as a trigger to start a uDMA
|
||
|
|
//! transaction. This function can be used to disable this feature if it was
|
||
|
|
//! enabled via a call to GPIODMATriggerEnable().
|
||
|
|
//!
|
||
|
|
//! \return None.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
void
|
||
|
|
GPIODMATriggerDisable(unsigned long ulPort)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Check the arguments.
|
||
|
|
//
|
||
|
|
ASSERT(GPIOBaseValid(ulPort));
|
||
|
|
|
||
|
|
//
|
||
|
|
// Set the pin as a DMA trigger.
|
||
|
|
//
|
||
|
|
if(ulPort == GPIOA0_BASE)
|
||
|
|
{
|
||
|
|
HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) &= ~0x1;
|
||
|
|
}
|
||
|
|
else if(ulPort == GPIOA1_BASE)
|
||
|
|
{
|
||
|
|
HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) &= ~0x2;
|
||
|
|
}
|
||
|
|
else if(ulPort == GPIOA2_BASE)
|
||
|
|
{
|
||
|
|
HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) &= ~0x4;
|
||
|
|
}
|
||
|
|
else if(ulPort == GPIOA3_BASE)
|
||
|
|
{
|
||
|
|
HWREG(COMMON_REG_BASE + COMMON_REG_O_APPS_GPIO_TRIG_EN) &= ~0x8;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
//
|
||
|
|
// Close the Doxygen group.
|
||
|
|
//! @}
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|