stmhal: Fix linker map for STM32L476 chips.

In particular, this makes the L4 .isr_vector section 16K in size so it's
the same as the F4/F7 MCUs.  The patch also moves the L4 filesystem to
the end of flash, which allows for 512K filesystem on the 1Mb devices
like the STM32L476DISC.

stmhal/Makefile

@@ -313,11 +313,13 @@ else
 	$(Q)$(DFU_UTIL) -a 0 -d $(DEVICE) -D $<
 endif
 
+TEXT_ADDR ?= 0x08020000
+
 deploy-stlink: $(BUILD)/firmware.dfu
 	$(ECHO) "Writing $(BUILD)/firmware0.bin to the board via ST-LINK"
 	$(Q)$(STFLASH) write $(BUILD)/firmware0.bin 0x08000000
 	$(ECHO) "Writing $(BUILD)/firmware1.bin to the board via ST-LINK"
-	$(Q)$(STFLASH) --reset write $(BUILD)/firmware1.bin 0x08020000
+	$(Q)$(STFLASH) --reset write $(BUILD)/firmware1.bin $(TEXT_ADDR)
 
 deploy-openocd: $(BUILD)/firmware.dfu
 	$(ECHO) "Writing $(BUILD)/firmware{0,1}.bin to the board via ST-LINK using OpenOCD"
@@ -327,7 +329,7 @@ $(BUILD)/firmware.dfu: $(BUILD)/firmware.elf
 	$(ECHO) "Create $@"
 	$(Q)$(OBJCOPY) -O binary -j .isr_vector $^ $(BUILD)/firmware0.bin
 	$(Q)$(OBJCOPY) -O binary -j .text -j .data $^ $(BUILD)/firmware1.bin
-	$(Q)$(PYTHON) $(DFU) -b 0x08000000:$(BUILD)/firmware0.bin -b 0x08020000:$(BUILD)/firmware1.bin $@
+	$(Q)$(PYTHON) $(DFU) -b 0x08000000:$(BUILD)/firmware0.bin -b $(TEXT_ADDR):$(BUILD)/firmware1.bin $@
 
 $(BUILD)/firmware.hex: $(BUILD)/firmware.elf
 	$(ECHO) "Create $@"

stmhal/boards/LIMIFROG/mpconfigboard.mk

@@ -2,3 +2,4 @@ MCU_SERIES = l4
 CMSIS_MCU = STM32L476xx
 AF_FILE = boards/stm32l476_af.csv
 LD_FILE = boards/stm32l476xe.ld
+TEXT_ADDR = 0x08004000

stmhal/boards/STM32L476DISC/mpconfigboard.mk

@@ -2,3 +2,4 @@ MCU_SERIES = l4
 CMSIS_MCU = STM32L476xx
 AF_FILE = boards/stm32l476_af.csv
 LD_FILE = boards/stm32l476xg.ld
+TEXT_ADDR = 0x08004000

stmhal/boards/stm32l476xe.ld

@@ -6,9 +6,9 @@
 MEMORY
 {                                                   
     FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 512K
-    FLASH_ISR (rx)  : ORIGIN = 0x08000000, LENGTH = 0x0000800 /* sector 0, 2 KiB */
-    FLASH_FS (r)    : ORIGIN = 0x08000800, LENGTH = 0x001F800 /* sectors 1-63 (2K each = 126 KiB) */
-    FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 0x0060000 /* Sector starting @ 64 */
+    FLASH_ISR (rx)  : ORIGIN = 0x08000000, LENGTH = 0x0004000 /* sectors 0-7, 16 KiB */
+    FLASH_TEXT (rx) : ORIGIN = 0x08004000, LENGTH = 0x005C000 /* sectors 8-191, 368 KiB */
+    FLASH_FS (r)    : ORIGIN = 0x08060000, LENGTH = 0x0020000 /* sectors 192-255, 128 KiB */
     RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 96K
     SRAM2 (xrw)     : ORIGIN = 0x10000000, LENGTH = 32K
 }
@@ -30,3 +30,6 @@ _ram_start = ORIGIN(RAM);
 _ram_end = ORIGIN(RAM) + LENGTH(RAM);
 _heap_start = _ebss; /* heap starts just after statically allocated memory */
 _heap_end = 0x20014000; /* tunable */
+
+_flash_fs_start = ORIGIN(FLASH_FS);
+_flash_fs_end   = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);

stmhal/boards/stm32l476xg.ld

@@ -6,9 +6,9 @@
 MEMORY
 {                                                   
     FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 1024K
-    FLASH_ISR (rx)  : ORIGIN = 0x08000000, LENGTH = 0x0000800 /* sector 0, 2 KiB */
-    FLASH_FS (r)    : ORIGIN = 0x08000800, LENGTH = 0x001F800 /* sectors 1-63 (2K each = 126 KiB) */
-    FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 0x0080000 /* Sector starting @ 64 */
+    FLASH_ISR (rx)  : ORIGIN = 0x08000000, LENGTH = 0x0004000 /* sectors 0-7, 16 KiB */
+    FLASH_TEXT (rx) : ORIGIN = 0x08004000, LENGTH = 0x007C000 /* sectors 8-255, 496 KiB */
+    FLASH_FS (r)    : ORIGIN = 0x08080000, LENGTH = 0x0080000 /* sectors 256-511 512 KiB */
     RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 96K
     SRAM2 (xrw)     : ORIGIN = 0x10000000, LENGTH = 32K
 }
@@ -32,3 +32,6 @@ _ram_start = ORIGIN(RAM);
 _ram_end = ORIGIN(RAM) + LENGTH(RAM);
 _heap_start = _ebss; /* heap starts just after statically allocated memory */
 _heap_end = 0x20014000; /* tunable */
+
+_flash_fs_start = ORIGIN(FLASH_FS);
+_flash_fs_end   = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);

stmhal/storage.c

@@ -86,11 +86,14 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k
 
 #elif defined(STM32L476xx)
 
+extern uint8_t _flash_fs_start;
+extern uint8_t _flash_fs_end;
+
 // The STM32L476 doesn't have CCRAM, so we use the 32K SRAM2 for this.
 #define CACHE_MEM_START_ADDR (0x10000000)       // SRAM2 data RAM, 32k
 #define FLASH_SECTOR_SIZE_MAX (0x00800)         // 2k max
-#define FLASH_MEM_SEG1_START_ADDR (0x08000800)  // sector 1
-#define FLASH_MEM_SEG1_NUM_BLOCKS (252)         // 1 Block=512 Bytes Reserve 126 kBytes
+#define FLASH_MEM_SEG1_START_ADDR ((long)&_flash_fs_start)
+#define FLASH_MEM_SEG1_NUM_BLOCKS ((&_flash_fs_end - &_flash_fs_start) / 512)
 
 #else
 #error "no storage support for this MCU"