Browse Source

rp2/boards: Add SIL_RP2040_SHIM board by Silicognition LLC.

Add new board Silicognition RP2040-Shim, RP2040 with 4 MB of flash
and W5500 drivers included and configured by default for use with
the Silicognition PoE-FeatherWing.

Co-authored-by: Matt Trentini <matt.trentini@gmail.com>

Signed-off-by: Patrick Van Oosterwijck <patrick@silicognition.com>
pull/13219/head
Patrick Van Oosterwijck 1 year ago
committed by Damien George
parent
commit
3270d856fd
  1. 21
      ports/rp2/boards/SIL_RP2040_SHIM/board.json
  2. 7
      ports/rp2/boards/SIL_RP2040_SHIM/deploy.md
  3. 3
      ports/rp2/boards/SIL_RP2040_SHIM/manifest.py
  4. 5
      ports/rp2/boards/SIL_RP2040_SHIM/mpconfigboard.cmake
  5. 43
      ports/rp2/boards/SIL_RP2040_SHIM/mpconfigboard.h
  6. 23
      ports/rp2/boards/SIL_RP2040_SHIM/pins.csv

21
ports/rp2/boards/SIL_RP2040_SHIM/board.json

@ -0,0 +1,21 @@
{
"deploy": [
"deploy.md"
],
"docs": "",
"features": [
"Dual-core",
"RGB LED",
"External Flash",
"USB"
],
"images": [
"rp2040-shim-product.jpg",
"RP2040-Shim-pinout.png"
],
"mcu": "rp2040",
"product": "RP2040-Shim",
"thumbnail": "",
"url": "https://silicognition.com/Products/rp2040-shim/",
"vendor": "Silicognition LLC"
}

7
ports/rp2/boards/SIL_RP2040_SHIM/deploy.md

@ -0,0 +1,7 @@
### Flashing via UF2 bootloader
To get the board in bootloader mode ready for the firmware update, execute
`machine.bootloader()` at the MicroPython REPL. Alternatively, double press
the reset button SW1. The uf2 file below should then be copied to the USB mass
storage device that appears. Once programming of the new firmware is complete
the device will automatically reset and be ready for use.

3
ports/rp2/boards/SIL_RP2040_SHIM/manifest.py

@ -0,0 +1,3 @@
include("$(PORT_DIR)/boards/manifest.py")
require("bundle-networking")

5
ports/rp2/boards/SIL_RP2040_SHIM/mpconfigboard.cmake

@ -0,0 +1,5 @@
# cmake file for Silicognition RP2040-Shim
set(PICO_BOARD none)
set(MICROPY_PY_NETWORK_WIZNET5K W5500)
set(MICROPY_PY_LWIP 1)
set(MICROPY_FROZEN_MANIFEST ${MICROPY_BOARD_DIR}/manifest.py)

43
ports/rp2/boards/SIL_RP2040_SHIM/mpconfigboard.h

@ -0,0 +1,43 @@
// Board config for Silicognition RP2040-Shim
#define MICROPY_HW_BOARD_NAME "Silicognition RP2040-Shim"
#define PICO_BOOT_STAGE2_CHOOSE_GENERIC_03H 1
#ifndef PICO_FLASH_SIZE_BYTES
#define PICO_FLASH_SIZE_BYTES (4 * 1024 * 1024)
#endif
#define MICROPY_HW_FLASH_STORAGE_BYTES (3 * 1024 * 1024)
#define MICROPY_HW_USB_VID (0x1209)
#define MICROPY_HW_USB_PID (0xF502)
#undef PICO_RP2040_B0_SUPPORTED
#define PICO_RP2040_B0_SUPPORTED 0
// Bus configuration
#define MICROPY_HW_I2C0_SCL (17)
#define MICROPY_HW_I2C0_SDA (16)
#define MICROPY_HW_SPI0_SCK (18)
#define MICROPY_HW_SPI0_MOSI (19)
#define MICROPY_HW_SPI0_MISO (20)
#define MICROPY_HW_SPI1_SCK (10)
#define MICROPY_HW_SPI1_MOSI (11)
#define MICROPY_HW_SPI1_MISO (12)
// Enable networking
#define MICROPY_PY_NETWORK (1)
#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "RP2040-Shim"
// Wiznet HW config
#define MICROPY_HW_WIZNET_SPI_ID (1)
#define MICROPY_HW_WIZNET_SPI_BAUDRATE (20 * 1000 * 1000)
#define MICROPY_HW_WIZNET_SPI_SCK (10)
#define MICROPY_HW_WIZNET_SPI_MOSI (11)
#define MICROPY_HW_WIZNET_SPI_MISO (12)
#define MICROPY_HW_WIZNET_PIN_CS (21)
// Since the PoE-FeatherWing doesn't connect RST, map RST by
// default to an unused pin
#define MICROPY_HW_WIZNET_PIN_RST (9)
// NeoPixel GPIO23, power not toggleable
// Red user LED GPIO22

23
ports/rp2/boards/SIL_RP2040_SHIM/pins.csv

@ -0,0 +1,23 @@
A0,GPIO29
A1,GPIO28
A2,GPIO27
A3,GPIO26
D24,GPIO24
D25,GPIO25
SCK,GPIO10
MOSI,GPIO11
MISO,GPIO12
D0,GPIO1
D1,GPIO0
D4,GPIO6
SDA,GPIO16
SCL,GPIO17
D5,GPIO18
D6,GPIO19
D9,GPIO20
D10,GPIO21
D11,GPIO15
D12,GPIO14
D13,GPIO22
LED,GPIO22
NEOPIXEL,GPIO23
1 A0 GPIO29
2 A1 GPIO28
3 A2 GPIO27
4 A3 GPIO26
5 D24 GPIO24
6 D25 GPIO25
7 SCK GPIO10
8 MOSI GPIO11
9 MISO GPIO12
10 D0 GPIO1
11 D1 GPIO0
12 D4 GPIO6
13 SDA GPIO16
14 SCL GPIO17
15 D5 GPIO18
16 D6 GPIO19
17 D9 GPIO20
18 D10 GPIO21
19 D11 GPIO15
20 D12 GPIO14
21 D13 GPIO22
22 LED GPIO22
23 NEOPIXEL GPIO23
Loading…
Cancel
Save