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ports/stm32/boards: Add WEACT_STM32H743 board.

Signed-off-by: Matt Trentini <matt.trentini@gmail.com>
pull/12540/head
Matt Trentini 1 year ago
parent
commit
479df8c6fe
  1. 45
      ports/stm32/boards/WEACT_STM32H743/bdev.c
  2. 13
      ports/stm32/boards/WEACT_STM32H743/board.json
  3. 19
      ports/stm32/boards/WEACT_STM32H743/deploy.md
  4. 4
      ports/stm32/boards/WEACT_STM32H743/manifest.py
  5. 135
      ports/stm32/boards/WEACT_STM32H743/mpconfigboard.h
  6. 14
      ports/stm32/boards/WEACT_STM32H743/mpconfigboard.mk
  7. 115
      ports/stm32/boards/WEACT_STM32H743/pins.csv
  8. 19
      ports/stm32/boards/WEACT_STM32H743/stm32h7xx_hal_conf.h
  9. 47
      ports/stm32/boards/WEACT_STM32H743/weact_stm32h743.ld

45
ports/stm32/boards/WEACT_STM32H743/bdev.c

@ -0,0 +1,45 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2023 Matt Trenitni
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "storage.h"
#include "qspi.h"
#if MICROPY_HW_SPIFLASH_ENABLE_CACHE
// Shared cache for first and second SPI block devices
STATIC mp_spiflash_cache_t spi_bdev_cache;
#endif
// First external SPI flash uses hardware QSPI interface
const mp_spiflash_config_t spiflash_config = {
.bus_kind = MP_SPIFLASH_BUS_QSPI,
.bus.u_qspi.data = NULL,
.bus.u_qspi.proto = &qspi_proto,
#if MICROPY_HW_SPIFLASH_ENABLE_CACHE
.cache = &spi_bdev_cache,
#endif
};
spi_bdev_t spi_bdev;

13
ports/stm32/boards/WEACT_STM32H743/board.json

@ -0,0 +1,13 @@
{
"deploy": [
"deploy.md"
],
"features": ["External Flash", "DAC", "Display","microSD", "USB", "USB-C"],
"images": [
"weact_stm32h743.jpg"
],
"mcu": "STM32H743VIT6",
"product": "WeAct Studio STM32H743",
"url": "https://github.com/WeActStudio/MiniSTM32H7xx",
"vendor": "WeAct Studio"
}

19
ports/stm32/boards/WEACT_STM32H743/deploy.md

@ -0,0 +1,19 @@
### WeAct Studio STM32H7xx
WeAct Studio make a number of STM32H7xx-based boards, they can all be updated
using
[DFU](https://en.wikipedia.org/wiki/USB?useskin=vector#Device_Firmware_Upgrade_mechanism).
### DFU update
Hold the Boot button - the middle of the cluster of three buttons - while the
board is reset (either by connecting USB or by pressing reset). Release the Boot
button shortly after the board has reset. The board ought to now be in DFU mode
and detectable as such from a connected computer.
Use a tool like [`dfu-util`](https://dfu-util.sourceforge.net/) to update the
firmware:
```bash
dfu-util --alt 0 -D firmware.dfu
```

4
ports/stm32/boards/WEACT_STM32H743/manifest.py

@ -0,0 +1,4 @@
include("$(PORT_DIR)/boards/manifest.py")
# Currently this file is a placeholder.
# It would be good to extend to add an LCD driver.

135
ports/stm32/boards/WEACT_STM32H743/mpconfigboard.h

@ -0,0 +1,135 @@
/*
* The MIT License (MIT)
* Copyright (c) 2023 Matt Trentini
*/
#define MICROPY_HW_BOARD_NAME "WEACT_STM32H743"
#define MICROPY_HW_MCU_NAME "STM32H743VIT6"
#define MICROPY_HW_FLASH_FS_LABEL "WEACT_STM32H743"
#define MICROPY_FATFS_EXFAT (1)
#define MICROPY_HW_ENABLE_RTC (1)
#define MICROPY_HW_ENABLE_RNG (1)
#define MICROPY_HW_ENABLE_ADC (1)
#define MICROPY_HW_ENABLE_DAC (1)
#define MICROPY_HW_ENABLE_USB (1)
#define MICROPY_HW_HAS_SWITCH (1)
#define MICROPY_HW_HAS_FLASH (1)
#define MICROPY_HW_ENABLE_SERVO (1)
#define MICROPY_HW_ENABLE_TIMER (1)
#define MICROPY_HW_ENABLE_SDCARD (1)
#define MICROPY_HW_ENABLE_MMCARD (0)
// Flash storage config
#define MICROPY_HW_SPIFLASH_ENABLE_CACHE (1)
#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (0)
// Clock config
#define MICROPY_HW_CLK_PLLM (5)
#define MICROPY_HW_CLK_PLLN (160)
#define MICROPY_HW_CLK_PLLP (2)
#define MICROPY_HW_CLK_PLLQ (4)
#define MICROPY_HW_CLK_PLLR (2)
#define MICROPY_HW_CLK_PLLVCI (RCC_PLL1VCIRANGE_1)
#define MICROPY_HW_CLK_PLLVCO (RCC_PLL1VCOWIDE)
#define MICROPY_HW_CLK_PLLFRAC (0)
#define MICROPY_HW_CLK_PLL3M (25)
#define MICROPY_HW_CLK_PLL3N (240)
#define MICROPY_HW_CLK_PLL3P (2)
#define MICROPY_HW_CLK_PLL3Q (5)
#define MICROPY_HW_CLK_PLL3R (2)
#define MICROPY_HW_CLK_PLL3VCI (RCC_PLL3VCIRANGE_1)
#define MICROPY_HW_CLK_PLL3VCO (RCC_PLL3VCOWIDE)
#define MICROPY_HW_CLK_PLL3FRAC (0)
// 32kHz crystal for RTC
#define MICROPY_HW_RTC_USE_LSE (1)
#define MICROPY_HW_RTC_USE_US (0)
#if (MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE == 0)
// W25Q64 for storage
#define MICROPY_HW_QSPI_PRESCALER (2) // 100 MHz
#define MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 (26)
#define MICROPY_HW_SPIFLASH_SIZE_BITS (64 * 1024 * 1024)
#define MICROPY_HW_QSPIFLASH_CS (pin_B6)
#define MICROPY_HW_QSPIFLASH_SCK (pin_B2)
#define MICROPY_HW_QSPIFLASH_IO0 (pin_D11)
#define MICROPY_HW_QSPIFLASH_IO1 (pin_D12)
#define MICROPY_HW_QSPIFLASH_IO2 (pin_E2)
#define MICROPY_HW_QSPIFLASH_IO3 (pin_D13)
// SPI flash, block device config
extern const struct _mp_spiflash_config_t spiflash_config;
extern struct _spi_bdev_t spi_bdev;
#define MICROPY_HW_BDEV_IOCTL(op, arg) ( \
(op) == BDEV_IOCTL_NUM_BLOCKS ? (MICROPY_HW_SPIFLASH_SIZE_BITS / 8 / FLASH_BLOCK_SIZE) : \
(op) == BDEV_IOCTL_INIT ? spi_bdev_ioctl(&spi_bdev, (op), (uint32_t)&spiflash_config) : \
spi_bdev_ioctl(&spi_bdev, (op), (arg)) \
)
#define MICROPY_HW_BDEV_READBLOCKS(dest, bl, n) spi_bdev_readblocks(&spi_bdev, (dest), (bl), (n))
#define MICROPY_HW_BDEV_WRITEBLOCKS(src, bl, n) spi_bdev_writeblocks(&spi_bdev, (src), (bl), (n))
#define MICROPY_HW_BDEV_SPIFLASH_EXTENDED (&spi_bdev)
#endif
// 4 wait states
#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_2
// UART
#define MICROPY_HW_UART1_TX (pin_A9)
#define MICROPY_HW_UART1_RX (pin_A10)
#define MICROPY_HW_UART2_TX (pin_A2)
#define MICROPY_HW_UART2_RX (pin_A3)
// I2C buses
#define MICROPY_HW_I2C1_SCL (pin_B8)
#define MICROPY_HW_I2C1_SDA (pin_B9)
#define MICROPY_HW_I2C2_SCL (pin_B10)
#define MICROPY_HW_I2C2_SDA (pin_B11)
// SPI buses
// NOTE: SPI3 is used for the QSPI flash.
#define MICROPY_HW_SPI1_NSS (pin_A4)
#define MICROPY_HW_SPI1_SCK (pin_A5)
#define MICROPY_HW_SPI1_MISO (pin_A6)
#define MICROPY_HW_SPI1_MOSI (pin_A7)
#define MICROPY_HW_SPI2_NSS (pin_B12)
#define MICROPY_HW_SPI2_SCK (pin_B13)
#define MICROPY_HW_SPI2_MISO (pin_B14)
#define MICROPY_HW_SPI2_MOSI (pin_B15)
#define MICROPY_HW_SPI4_NSS (pin_E11)
#define MICROPY_HW_SPI4_SCK (pin_E12)
#define MICROPY_HW_SPI4_MOSI (pin_E14)
#define MICROPY_HW_SPI4_MISO (pin_E13)
// https://community.st.com/t5/embedded-software-mcus/issue-with-bootloader-on-stm32h743-using-boot0-and-inline/td-p/73183
// CAN buses
#define MICROPY_HW_CAN1_TX (pin_B9)
#define MICROPY_HW_CAN1_RX (pin_B8)
// USRSW
#define MICROPY_HW_USRSW_PIN (pin_C13) // K1 on the board.
#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL)
#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_FALLING)
#define MICROPY_HW_USRSW_PRESSED (0)
// LEDs
#define MICROPY_HW_LED1 (pin_E3) // the only controllable LED on the board.
#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_low(pin))
#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_high(pin))
// SD Card SDMMC
#define MICROPY_HW_SDCARD_SDMMC (1)
#define MICROPY_HW_SDCARD_CK (pin_C12)
#define MICROPY_HW_SDCARD_CMD (pin_D2)
#define MICROPY_HW_SDCARD_D0 (pin_C8)
#define MICROPY_HW_SDCARD_D1 (pin_C9)
#define MICROPY_HW_SDCARD_D2 (pin_C10)
#define MICROPY_HW_SDCARD_D3 (pin_C11)
// USB config
#define MICROPY_HW_USB_FS (1)

14
ports/stm32/boards/WEACT_STM32H743/mpconfigboard.mk

@ -0,0 +1,14 @@
# MCU settings
MCU_SERIES = h7
CMSIS_MCU = STM32H743xx
MICROPY_FLOAT_IMPL = double
AF_FILE = boards/stm32h743_af.csv
LD_FILES = boards/WEACT_STM32H743/weact_stm32h743.ld boards/common_basic.ld
TEXT0_ADDR = 0x08000000
# MicroPython settings
MICROPY_PY_SSL = 1
MICROPY_SSL_MBEDTLS = 1
MICROPY_PY_LWIP = 1
MICROPY_PY_USSL = 1
MICROPY_VFS_LFS2 = 1

115
ports/stm32/boards/WEACT_STM32H743/pins.csv

@ -0,0 +1,115 @@
PA0,PA0
PA1,PA1
PA2,PA2
PA3,PA3
PA4,PA4
PA5,PA5
PA6,PA6
PA7,PA7
PA8,PA8
PA9,PA9
PA10,PA10
PA11,PA11
PA12,PA12
PA13,PA13
PA14,PA14
PA15,PA15
PB0,PB0
PB1,PB1
PB2,PB2
PB3,PB3
PB4,PB4
PB5,PB5
PB6,PB6
PB7,PB7
PB8,PB8
PB9,PB9
PB10,PB10
PB11,PB11
PB12,PB12
PB13,PB13
PB14,PB14
PB15,PB15
PC0,PC0
PC1,PC1
PC2,PC2
PC3,PC3
PC4,PC4
PC5,PC5
PC6,PC6
PC7,PC7
PC8,PC8
PC9,PC9
PC10,PC10
PC11,PC11
PC12,PC12
PC13,PC13
PC14,PC14
PC15,PC15
PD0,PD0
PD1,PD1
PD2,PD2
PD3,PD3
PD4,PD4
PD5,PD5
PD6,PD6
PD7,PD7
PD8,PD8
PD9,PD9
PD10,PD10
PD11,PD11
PD12,PD12
PD13,PD13
PD14,PD14
PD15,PD15
PE0,PE0
PE1,PE1
PE2,PE2
PE3,PE3
PE4,PE4
PE5,PE5
PE6,PE6
PE7,PE7
PE8,PE8
PE9,PE9
PE10,PE10
PE11,PE11
PE12,PE12
PE13,PE13
PE14,PE14
PE15,PE15
LED_BLUE,PE3
KEY_1,PC13
QSPI_CS,PB6
QSPI_CLK,PB2
QSPI_D0,PD11
QSPI_D1,PD12
QSPI_D2,PE2
QSPI_D3,PD13
USB_DM,PA11
USB_DP,PA12
DCMI_SDA,PB11
DCMI_SCL,PB10
DCMI_RESET,PC4
DCMI_CH1,PA4
DCMI_PWDN,PA7
DCMI_HREF,PA4
DCMI_VSYNC,PB7
DCMI_D0,PC6
DCMI_D1,PC7
DCMI_D2,PE0
DCMI_D3,PE1
DCMI_D4,PE4
DCMI_D5,PD3
DCMI_D6,PE5
DCMI_D7,PE6
DCMI_PCLK,PA6
DCMI_XCLK,PA8
OSC32_IN,PC14
OSC32_OUT,PC15
SDIO_CK,PC12
SDIO_CMD,PD2
SDIO_D0,PC8
SDIO_D1,PC9
SDIO_D2,PC10
SDIO_D3,PC11
1 PA0 PA0
2 PA1 PA1
3 PA2 PA2
4 PA3 PA3
5 PA4 PA4
6 PA5 PA5
7 PA6 PA6
8 PA7 PA7
9 PA8 PA8
10 PA9 PA9
11 PA10 PA10
12 PA11 PA11
13 PA12 PA12
14 PA13 PA13
15 PA14 PA14
16 PA15 PA15
17 PB0 PB0
18 PB1 PB1
19 PB2 PB2
20 PB3 PB3
21 PB4 PB4
22 PB5 PB5
23 PB6 PB6
24 PB7 PB7
25 PB8 PB8
26 PB9 PB9
27 PB10 PB10
28 PB11 PB11
29 PB12 PB12
30 PB13 PB13
31 PB14 PB14
32 PB15 PB15
33 PC0 PC0
34 PC1 PC1
35 PC2 PC2
36 PC3 PC3
37 PC4 PC4
38 PC5 PC5
39 PC6 PC6
40 PC7 PC7
41 PC8 PC8
42 PC9 PC9
43 PC10 PC10
44 PC11 PC11
45 PC12 PC12
46 PC13 PC13
47 PC14 PC14
48 PC15 PC15
49 PD0 PD0
50 PD1 PD1
51 PD2 PD2
52 PD3 PD3
53 PD4 PD4
54 PD5 PD5
55 PD6 PD6
56 PD7 PD7
57 PD8 PD8
58 PD9 PD9
59 PD10 PD10
60 PD11 PD11
61 PD12 PD12
62 PD13 PD13
63 PD14 PD14
64 PD15 PD15
65 PE0 PE0
66 PE1 PE1
67 PE2 PE2
68 PE3 PE3
69 PE4 PE4
70 PE5 PE5
71 PE6 PE6
72 PE7 PE7
73 PE8 PE8
74 PE9 PE9
75 PE10 PE10
76 PE11 PE11
77 PE12 PE12
78 PE13 PE13
79 PE14 PE14
80 PE15 PE15
81 LED_BLUE PE3
82 KEY_1 PC13
83 QSPI_CS PB6
84 QSPI_CLK PB2
85 QSPI_D0 PD11
86 QSPI_D1 PD12
87 QSPI_D2 PE2
88 QSPI_D3 PD13
89 USB_DM PA11
90 USB_DP PA12
91 DCMI_SDA PB11
92 DCMI_SCL PB10
93 DCMI_RESET PC4
94 DCMI_CH1 PA4
95 DCMI_PWDN PA7
96 DCMI_HREF PA4
97 DCMI_VSYNC PB7
98 DCMI_D0 PC6
99 DCMI_D1 PC7
100 DCMI_D2 PE0
101 DCMI_D3 PE1
102 DCMI_D4 PE4
103 DCMI_D5 PD3
104 DCMI_D6 PE5
105 DCMI_D7 PE6
106 DCMI_PCLK PA6
107 DCMI_XCLK PA8
108 OSC32_IN PC14
109 OSC32_OUT PC15
110 SDIO_CK PC12
111 SDIO_CMD PD2
112 SDIO_D0 PC8
113 SDIO_D1 PC9
114 SDIO_D2 PC10
115 SDIO_D3 PC11

19
ports/stm32/boards/WEACT_STM32H743/stm32h7xx_hal_conf.h

@ -0,0 +1,19 @@
/* This file is part of the MicroPython project, http://micropython.org/
* The MIT License (MIT)
* Copyright (c) 2019 Damien P. George
*/
#ifndef MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H
#define MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H
#include "boards/stm32h7xx_hal_conf_base.h"
// Oscillator values in Hz
#define HSE_VALUE (25000000)
#define LSE_VALUE (32768)
#define EXTERNAL_CLOCK_VALUE (12288000)
// Oscillator timeouts in ms
#define HSE_STARTUP_TIMEOUT (5000)
#define LSE_STARTUP_TIMEOUT (5000)
#endif // MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H

47
ports/stm32/boards/WEACT_STM32H743/weact_stm32h743.ld

@ -0,0 +1,47 @@
/*
GNU linker script for WeAct Studio STM32H743
*/
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1536K /* sectors (0-7) + (0-3) */
FLASH_APP (rx) : ORIGIN = 0x08020000, LENGTH = 1408K /* sectors (1-7) + (0-3) */
FLASH_FS (r) : ORIGIN = 0x08180000, LENGTH = 512K /* sectors (4-7) */
FLASH_EXT (rx) : ORIGIN = 0x90000000, LENGTH = 8192K /* external QSPI */
DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K /* Used for storage cache */
RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 512K /* AXI SRAM */
RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* Define the stack. The stack is full descending so begins just above last byte
of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
_sstack = _estack - 16K; /* tunable */
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
_heap_end = _sstack;
/* Location of filesystem RAM cache */
_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(DTCM);
_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(DTCM) + LENGTH(DTCM);
/* Location of filesystem flash storage */
_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
/* Define output sections */
SECTIONS
{
.eth_buffers (NOLOAD) : {
. = ABSOLUTE(0x30040000);
*eth.o*(.bss.eth_dma)
} >RAM_D2
}
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