diff --git a/ports/stm32/machine_uart.c b/ports/stm32/machine_uart.c
index dcaa842a08..f5f56c703e 100644
--- a/ports/stm32/machine_uart.c
+++ b/ports/stm32/machine_uart.c
@@ -217,17 +217,6 @@ STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, size_t n_args, const
 
     // setup the read buffer
     m_del(byte, self->read_buf, self->read_buf_len << self->char_width);
-    if (bits == UART_WORDLENGTH_9B && parity == UART_PARITY_NONE) {
-        self->char_mask = 0x1ff;
-        self->char_width = CHAR_WIDTH_9BIT;
-    } else {
-        if (bits == UART_WORDLENGTH_9B || parity == UART_PARITY_NONE) {
-            self->char_mask = 0xff;
-        } else {
-            self->char_mask = 0x7f;
-        }
-        self->char_width = CHAR_WIDTH_8BIT;
-    }
     if (args.rxbuf.u_int >= 0) {
         // rxbuf overrides legacy read_buf_len
         args.read_buf_len.u_int = args.rxbuf.u_int;
diff --git a/ports/stm32/uart.c b/ports/stm32/uart.c
index 531cf5dfc1..9d93bc1e5e 100644
--- a/ports/stm32/uart.c
+++ b/ports/stm32/uart.c
@@ -318,6 +318,18 @@ bool uart_init(pyb_uart_obj_t *uart_obj,
     uart_obj->is_enabled = true;
     uart_obj->attached_to_repl = false;
 
+    if (bits == UART_WORDLENGTH_9B && parity == UART_PARITY_NONE) {
+        uart_obj->char_mask = 0x1ff;
+        uart_obj->char_width = CHAR_WIDTH_9BIT;
+    } else {
+        if (bits == UART_WORDLENGTH_9B || parity == UART_PARITY_NONE) {
+            uart_obj->char_mask = 0xff;
+        } else {
+            uart_obj->char_mask = 0x7f;
+        }
+        uart_obj->char_width = CHAR_WIDTH_8BIT;
+    }
+
     return true;
 }