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@ -308,23 +308,30 @@ STATIC mp_obj_t pyb_pin_high(mp_obj_t self_in) { |
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} |
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STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_pin_high_obj, pyb_pin_high); |
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// pin.irq()
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STATIC mp_obj_t pyb_pin_irq(size_t n_args, const mp_obj_t *args) { |
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pyb_pin_obj_t *self = MP_OBJ_TO_PTR(args[0]); |
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// pin.irq(*, trigger, handler=None)
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STATIC mp_obj_t pyb_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { |
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enum { ARG_trigger, ARG_handler }; |
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static const mp_arg_t allowed_args[] = { |
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{ MP_QSTR_trigger, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, |
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{ MP_QSTR_handler, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, |
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}; |
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pyb_pin_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); |
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; |
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mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); |
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if (self->phys_port >= 16) { |
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nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "pin does not have IRQ capabilities")); |
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} |
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if (n_args > 1) { |
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if (args[ARG_trigger].u_int != 0) { |
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// configure irq
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int trig = mp_obj_get_int(args[1]); |
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mp_obj_t handler = args[2]; |
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mp_obj_t handler = args[ARG_handler].u_obj; |
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if (handler == mp_const_none) { |
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handler = MP_OBJ_NULL; |
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} |
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ETS_GPIO_INTR_DISABLE(); |
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MP_STATE_PORT(pin_irq_handler)[self->phys_port] = handler; |
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SET_TRIGGER(self->phys_port, trig); |
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SET_TRIGGER(self->phys_port, args[ARG_trigger].u_int); |
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GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, 1 << self->phys_port); |
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ETS_GPIO_INTR_ENABLE(); |
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} |
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@ -332,7 +339,7 @@ STATIC mp_obj_t pyb_pin_irq(size_t n_args, const mp_obj_t *args) { |
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// return the irq object
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return MP_OBJ_FROM_PTR(&pin_irq_obj[self->phys_port]); |
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} |
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STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_pin_irq_obj, 1, 3, pyb_pin_irq); |
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STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_pin_irq_obj, 1, pyb_pin_irq); |
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STATIC const mp_map_elem_t pyb_pin_locals_dict_table[] = { |
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// instance methods
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