@ -28,6 +28,7 @@
# include "py/mperrno.h"
# include "py/mperrno.h"
# include "py/mphal.h"
# include "py/mphal.h"
# include "dma.h"
# include "pin.h"
# include "pin.h"
# include "pin_static_af.h"
# include "pin_static_af.h"
# include "pendsv.h"
# include "pendsv.h"
@ -382,27 +383,21 @@ int sdio_transfer_cmd53(bool write, uint32_t block_size, uint32_t arg, size_t le
}
}
# if defined(STM32F7)
# if defined(STM32F7)
DMA2 - > LIFCR = 0x3f < < 22 ;
DMA2_Stream3 - > FCR = 0x07 ; // ?
DMA2_Stream3 - > PAR = ( uint32_t ) & SDMMC - > FIFO ;
if ( ( uint32_t ) buf & 3 ) {
if ( ( uint32_t ) buf & 3 ) {
printf ( " sdio_transfer_cmd53: buf=%p is not aligned for DMA \n " , buf ) ;
printf ( " sdio_transfer_cmd53: buf=%p is not aligned for DMA \n " , buf ) ;
return - MP_EINVAL ;
return - MP_EINVAL ;
}
}
DMA2_Stream3 - > M0AR = ( uint32_t ) buf ;
uint32_t dma_config =
DMA2_Stream3 - > NDTR = ( ( len + block_size - 1 ) & ~ ( block_size - 1 ) ) / 4 ;
2 < < DMA_SxCR_MSIZE_Pos // MSIZE word
DMA2_Stream3 - > CR = 4 < < 25 // channel 4
| 2 < < DMA_SxCR_PSIZE_Pos // PSIZE word
| 1 < < 23 // MBURST INCR4
| write < < DMA_SxCR_DIR_Pos // DIR mem-to-periph
| 1 < < 21 // PBURST INCR4
| 1 < < DMA_SxCR_PFCTRL_Pos // PFCTRL periph is flow controller
| 3 < < 16 // PL very high
| 2 < < 13 // MSIZE word
| 2 < < 11 // PSIZE word
| 1 < < 10 // MINC enabled
| 0 < < 9 // PINC disabled
| write < < 6 // DIR mem-to-periph
| 1 < < 5 // PFCTRL periph is flow controller
| 1 < < 0 // EN
;
;
uint32_t dma_src = ( uint32_t ) buf ;
uint32_t dma_dest = ( uint32_t ) & SDMMC - > FIFO ;
uint32_t dma_len = ( ( len + block_size - 1 ) & ~ ( block_size - 1 ) ) / 4 ;
dma_nohal_init ( & dma_SDIO_0 , dma_config ) ;
dma_nohal_start ( & dma_SDIO_0 , dma_src , dma_dest , dma_len ) ;
# else
# else
SDMMC - > IDMABASE0 = ( uint32_t ) buf ;
SDMMC - > IDMABASE0 = ( uint32_t ) buf ;
SDMMC - > IDMACTRL = SDMMC_IDMA_IDMAEN ;
SDMMC - > IDMACTRL = SDMMC_IDMA_IDMAEN ;
@ -456,6 +451,9 @@ int sdio_transfer_cmd53(bool write, uint32_t block_size, uint32_t arg, size_t le
# else
# else
printf ( " sdio_transfer_cmd53: timeout wr=%d len=%u dma=%u buf_idx=%u STA=%08x SDMMC=%08x:%08x IDMA=%08x \n " , write , ( uint ) len , ( uint ) dma , sdmmc_buf_cur - buf , ( uint ) SDMMC - > STA , ( uint ) SDMMC - > DCOUNT , ( uint ) SDMMC - > DCTRL , ( uint ) SDMMC - > IDMACTRL ) ;
printf ( " sdio_transfer_cmd53: timeout wr=%d len=%u dma=%u buf_idx=%u STA=%08x SDMMC=%08x:%08x IDMA=%08x \n " , write , ( uint ) len , ( uint ) dma , sdmmc_buf_cur - buf , ( uint ) SDMMC - > STA , ( uint ) SDMMC - > DCOUNT , ( uint ) SDMMC - > DCTRL , ( uint ) SDMMC - > IDMACTRL ) ;
# endif
# endif
if ( sdmmc_dma ) {
dma_nohal_deinit ( & dma_SDIO_0 ) ;
}
return - MP_ETIMEDOUT ;
return - MP_ETIMEDOUT ;
}
}
}
}
@ -468,6 +466,9 @@ int sdio_transfer_cmd53(bool write, uint32_t block_size, uint32_t arg, size_t le
# else
# else
printf ( " sdio_transfer_cmd53: error=%08lx wr=%d len=%u dma=%u buf_idx=%u STA=%08x SDMMC=%08x:%08x IDMA=%08x \n " , sdmmc_error , write , ( uint ) len , ( uint ) dma , sdmmc_buf_cur - buf , ( uint ) SDMMC - > STA , ( uint ) SDMMC - > DCOUNT , ( uint ) SDMMC - > DCTRL , ( uint ) SDMMC - > IDMACTRL ) ;
printf ( " sdio_transfer_cmd53: error=%08lx wr=%d len=%u dma=%u buf_idx=%u STA=%08x SDMMC=%08x:%08x IDMA=%08x \n " , sdmmc_error , write , ( uint ) len , ( uint ) dma , sdmmc_buf_cur - buf , ( uint ) SDMMC - > STA , ( uint ) SDMMC - > DCOUNT , ( uint ) SDMMC - > DCTRL , ( uint ) SDMMC - > IDMACTRL ) ;
# endif
# endif
if ( sdmmc_dma ) {
dma_nohal_deinit ( & dma_SDIO_0 ) ;
}
return - ( 0x1000000 | sdmmc_error ) ;
return - ( 0x1000000 | sdmmc_error ) ;
}
}
@ -476,6 +477,8 @@ int sdio_transfer_cmd53(bool write, uint32_t block_size, uint32_t arg, size_t le
printf ( " sdio_transfer_cmd53: didn't transfer correct length: cur=%p top=%p \n " , sdmmc_buf_cur , sdmmc_buf_top ) ;
printf ( " sdio_transfer_cmd53: didn't transfer correct length: cur=%p top=%p \n " , sdmmc_buf_cur , sdmmc_buf_top ) ;
return - MP_EIO ;
return - MP_EIO ;
}
}
} else {
dma_nohal_deinit ( & dma_SDIO_0 ) ;
}
}
return 0 ;
return 0 ;