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@ -109,17 +109,16 @@ STATIC int mp_spiflash_transfer_cmd_addr_data(mp_spiflash_t *self, uint8_t cmd, |
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return ret; |
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} |
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STATIC uint32_t mp_spiflash_read_cmd(mp_spiflash_t *self, uint8_t cmd, size_t len) { |
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STATIC int mp_spiflash_read_cmd(mp_spiflash_t *self, uint8_t cmd, size_t len, uint32_t *dest) { |
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const mp_spiflash_config_t *c = self->config; |
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if (c->bus_kind == MP_SPIFLASH_BUS_SPI) { |
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uint32_t buf; |
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mp_hal_pin_write(c->bus.u_spi.cs, 0); |
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c->bus.u_spi.proto->transfer(c->bus.u_spi.data, 1, &cmd, NULL); |
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c->bus.u_spi.proto->transfer(c->bus.u_spi.data, len, (void*)&buf, (void*)&buf); |
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c->bus.u_spi.proto->transfer(c->bus.u_spi.data, len, (void*)dest, (void*)dest); |
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mp_hal_pin_write(c->bus.u_spi.cs, 1); |
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return buf; |
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return 0; |
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} else { |
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return c->bus.u_qspi.proto->read_cmd(c->bus.u_qspi.data, cmd, len); |
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return c->bus.u_qspi.proto->read_cmd(c->bus.u_qspi.data, cmd, len, dest); |
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} |
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} |
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@ -139,9 +138,12 @@ STATIC int mp_spiflash_write_cmd(mp_spiflash_t *self, uint8_t cmd) { |
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} |
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STATIC int mp_spiflash_wait_sr(mp_spiflash_t *self, uint8_t mask, uint8_t val, uint32_t timeout) { |
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uint8_t sr; |
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do { |
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sr = mp_spiflash_read_cmd(self, CMD_RDSR, 1); |
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uint32_t sr; |
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int ret = mp_spiflash_read_cmd(self, CMD_RDSR, 1, &sr); |
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if (ret != 0) { |
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return ret; |
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} |
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if ((sr & mask) == val) { |
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return 0; // success
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} |
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@ -180,17 +182,23 @@ void mp_spiflash_init(mp_spiflash_t *self) { |
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#if defined(CHECK_DEVID) |
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// Validate device id
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uint32_t devid = mp_spiflash_read_cmd(self, CMD_RD_DEVID, 3); |
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if (devid != CHECK_DEVID) { |
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return 0; |
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uint32_t devid; |
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int ret = mp_spiflash_read_cmd(self, CMD_RD_DEVID, 3, &devid); |
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if (ret != 0 || devid != CHECK_DEVID) { |
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mp_spiflash_release_bus(self); |
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return; |
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} |
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#endif |
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if (self->config->bus_kind == MP_SPIFLASH_BUS_QSPI) { |
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// Set QE bit
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uint32_t data = (mp_spiflash_read_cmd(self, CMD_RDSR, 1) & 0xff) |
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| (mp_spiflash_read_cmd(self, CMD_RDCR, 1) & 0xff) << 8; |
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if (!(data & (QSPI_QE_MASK << 8))) { |
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uint32_t sr = 0, cr = 0; |
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int ret = mp_spiflash_read_cmd(self, CMD_RDSR, 1, &sr); |
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if (ret == 0) { |
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ret = mp_spiflash_read_cmd(self, CMD_RDCR, 1, &cr); |
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} |
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uint32_t data = (sr & 0xff) | (cr & 0xff) << 8; |
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if (ret == 0 && !(data & (QSPI_QE_MASK << 8))) { |
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data |= QSPI_QE_MASK << 8; |
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mp_spiflash_write_cmd(self, CMD_WREN); |
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mp_spiflash_write_cmd_data(self, CMD_WRSR, 2, data); |
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