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micropython/ports/stm32/boards/stm32f722_af.csv

9.9 KiB
Raw Blame History

1PortAF0AF1AF2AF3AF4AF5AF6AF7AF8AF9AF10AF11AF12AF13AF14AF15
2SYSTIM1/2TIM3/4/5TIM8/9/10/11/LPTIM1I2C1/2/3/USART1SPI1/I2S1/SPI2/I2S2/SPI3/I2S3/SPI4/5SPI2/I2S2/SPI3/I2S3/SPI3/I2S3/SAI1/UART4SPI2/I2S2/SPI3/I2S3/USART1/2/3/UART5SAI2/USART6/UART4/5/7/8/OTG1_FSCAN1/TIM12/13/14/QUADSPI/FMC/OTG2_HSSAI2/QUADSPI/SDMMC2/OTG2_HS/OTG1_FSSDMMC2UART7/FMC/SDMMC1/OTG2_FSSYSADC
3PortAPA0TIM2_CH1/TIM2_ETRTIM5_CH1TIM8_ETRUSART2_CTSUART4_TXSAI2_SD_BEVENTOUTADC123_IN0
4PortAPA1TIM2_CH2TIM5_CH2USART2_RTSUART4_RXQUADSPI_BK1_IO3SAI2_MCK_BEVENTOUTADC123_IN1
5PortAPA2TIM2_CH3TIM5_CH3TIM9_CH1USART2_TXSAI2_SCK_BEVENTOUTADC123_IN2
6PortAPA3TIM2_CH4TIM5_CH4TIM9_CH2USART2_RXOTG_HS_ULPI_D0EVENTOUTADC123_IN3
7PortAPA4SPI1_NSS/I2S1_WSSPI3_NSS/I2S3_WSUSART2_CKOTG_HS_SOFEVENTOUTADC12_IN4
8PortAPA5TIM2_CH1/TIM2_ETRTIM8_CH1NSPI1_SCK/I2S1_CKOTG_HS_ULPI_CKEVENTOUTADC12_IN5
9PortAPA6TIM1_BKINTIM3_CH1TIM8_BKINSPI1_MISOTIM13_CH1EVENTOUTADC12_IN6
10PortAPA7TIM1_CH1NTIM3_CH2TIM8_CH1NSPI1_MOSI/I2S1_SDTIM14_CH1FMC_SDNWEEVENTOUTADC12_IN7
11PortAPA8MCO1TIM1_CH1TIM8_BKIN2I2C3_SCLUSART1_CKOTG_FS_SOFEVENTOUT
12PortAPA9TIM1_CH2I2C3_SMBASPI2_SCK/I2S2_CKUSART1_TXEVENTOUT
13PortAPA10TIM1_CH3USART1_RXOTG_FS_IDEVENTOUT
14PortAPA11TIM1_CH4USART1_CTSCAN1_RXOTG_FS_DMEVENTOUT
15PortAPA12TIM1_ETRUSART1_RTSSAI2_FS_BCAN1_TXOTG_FS_DPEVENTOUT
16PortAPA13JTMS/SWDIOEVENTOUT
17PortAPA14JTCK/SWCLKEVENTOUT
18PortAPA15JTDITIM2_CH1/TIM2_ETRSPI1_NSS/I2S1_WSSPI3_NSS/I2S3_WSUART4_RTSEVENTOUT
19PortBPB0TIM1_CH2NTIM3_CH3TIM8_CH2NUART4_CTSOTG_HS_ULPI_D1EVENTOUTADC12_IN8
20PortBPB1TIM1_CH3NTIM3_CH4TIM8_CH3NOTG_HS_ULPI_D2EVENTOUTADC12_IN9
21PortBPB2SAI1_SD_ASPI3_MOSI/I2S3_SDQUADSPI_CLKEVENTOUT
22PortBPB3JTDO/TRACESWOTIM2_CH2SPI1_SCK/I2S1_CKSPI3_SCK/I2S3_CKSDMMC2_D2EVENTOUT
23PortBPB4NJTRSTTIM3_CH1SPI1_MISOSPI3_MISOSPI2_NSS/I2S2_WSSDMMC2_D3EVENTOUT
24PortBPB5TIM3_CH2I2C1_SMBASPI1_MOSI/I2S1_SDSPI3_MOSI/I2S3_SDOTG_HS_ULPI_D7FMC_SDCKE1EVENTOUT
25PortBPB6TIM4_CH1I2C1_SCLUSART1_TXQUADSPI_BK1_NCSFMC_SDNE1EVENTOUT
26PortBPB7TIM4_CH2I2C1_SDAUSART1_RXFMC_NLEVENTOUT
27PortBPB8TIM4_CH3TIM10_CH1I2C1_SCLCAN1_RXSDMMC2_D4SDMMC1_D4EVENTOUT
28PortBPB9TIM4_CH4TIM11_CH1I2C1_SDASPI2_NSS/I2S2_WSCAN1_TXSDMMC2_D5SDMMC1_D5EVENTOUT
29PortBPB10TIM2_CH3I2C2_SCLSPI2_SCK/I2S2_CKUSART3_TXOTG_HS_ULPI_D3EVENTOUT
30PortBPB11TIM2_CH4I2C2_SDAUSART3_RXOTG_HS_ULPI_D4EVENTOUT
31PortBPB12TIM1_BKINI2C2_SMBASPI2_NSS/I2S2_WSUSART3_CKOTG_HS_ULPI_D5OTG_HS_IDEVENTOUT
32PortBPB13TIM1_CH1NSPI2_SCK/I2S2_CKUSART3_CTSOTG_HS_ULPI_D6EVENTOUT
33PortBPB14TIM1_CH2NTIM8_CH2NSPI2_MISOUSART3_RTSTIM12_CH1SDMMC2_D0OTG_HS_DMEVENTOUT
34PortBPB15RTC_REFINTIM1_CH3NTIM8_CH3NSPI2_MOSI/I2S2_SDTIM12_CH2SDMMC2_D1OTG_HS_DPEVENTOUT
35PortCPC0SAI2_FS_BOTG_HS_ULPI_STPFMC_SDNWEEVENTOUTADC123_IN10
36PortCPC1TRACED0SPI2_MOSI/I2S2_SDSAI1_SD_AEVENTOUTADC123_IN11
37PortCPC2SPI2_MISOOTG_HS_ULPI_DIRFMC_SDNE0EVENTOUTADC123_IN12
38PortCPC3SPI2_MOSI/I2S2_SDOTG_HS_ULPI_NXTFMC_SDCKE0EVENTOUTADC123_IN13
39PortCPC4I2S1_MCKFMC_SDNE0EVENTOUTADC12_IN14
40PortCPC5FMC_SDCKE0EVENTOUTADC12_IN15
41PortCPC6TIM3_CH1TIM8_CH1I2S2_MCKUSART6_TXSDMMC2_D6SDMMC1_D6EVENTOUT
42PortCPC7TIM3_CH2TIM8_CH2I2S3_MCKUSART6_RXSDMMC2_D7SDMMC1_D7EVENTOUT
43PortCPC8TRACED1TIM3_CH3TIM8_CH3UART5_RTSUSART6_CKSDMMC1_D0EVENTOUT
44PortCPC9MCO2TIM3_CH4TIM8_CH4I2C3_SDAI2S_CKINUART5_CTSQUADSPI_BK1_IO0SDMMC1_D1EVENTOUT
45PortCPC10SPI3_SCK/I2S3_CKUSART3_TXUART4_TXQUADSPI_BK1_IO1SDMMC1_D2EVENTOUT
46PortCPC11SPI3_MISOUSART3_RXUART4_RXQUADSPI_BK2_NCSSDMMC1_D3EVENTOUT
47PortCPC12TRACED3SPI3_MOSI/I2S3_SDUSART3_CKUART5_TXSDMMC1_CKEVENTOUT
48PortCPC13EVENTOUT
49PortCPC14EVENTOUT
50PortCPC15EVENTOUT
51PortDPD0CAN1_RXFMC_D2EVENTOUT
52PortDPD1CAN1_TXFMC_D3EVENTOUT
53PortDPD2TRACED2TIM3_ETRUART5_RXSDMMC1_CMDEVENTOUT
54PortDPD3SPI2_SCK/I2S2_CKUSART2_CTSFMC_CLKEVENTOUT
55PortDPD4USART2_RTSFMC_NOEEVENTOUT
56PortDPD5USART2_TXFMC_NWEEVENTOUT
57PortDPD6SPI3_MOSI/I2S3_SDSAI1_SD_AUSART2_RXSDMMC2_CKFMC_NWAITEVENTOUT
58PortDPD7USART2_CKSDMMC2_CMDFMC_NE1EVENTOUT
59PortDPD8USART3_TXFMC_D13EVENTOUT
60PortDPD9USART3_RXFMC_D14EVENTOUT
61PortDPD10USART3_CKFMC_D15EVENTOUT
62PortDPD11USART3_CTSQUADSPI_BK1_IO0SAI2_SD_AFMC_A16/FMC_CLEEVENTOUT
63PortDPD12TIM4_CH1LPTIM1_IN1USART3_RTSQUADSPI_BK1_IO1SAI2_FS_AFMC_A17/FMC_ALEEVENTOUT
64PortDPD13TIM4_CH2LPTIM1_OUTQUADSPI_BK1_IO3SAI2_SCK_AFMC_A18EVENTOUT
65PortDPD14TIM4_CH3UART8_CTSFMC_D0EVENTOUT
66PortDPD15TIM4_CH4UART8_RTSFMC_D1EVENTOUT
67PortEPE0TIM4_ETRLPTIM1_ETRUART8_RXSAI2_MCK_AFMC_NBL0EVENTOUT
68PortEPE1LPTIM1_IN2UART8_TXFMC_NBL1EVENTOUT
69PortEPE2TRACECLKSPI4_SCKSAI1_MCLK_AQUADSPI_BK1_IO2FMC_A23EVENTOUT
70PortEPE3TRACED0SAI1_SD_BFMC_A19EVENTOUT
71PortEPE4TRACED1SPI4_NSSSAI1_FS_AFMC_A20EVENTOUT
72PortEPE5TRACED2TIM9_CH1SPI4_MISOSAI1_SCK_AFMC_A21EVENTOUT
73PortEPE6TRACED3TIM1_BKIN2TIM9_CH2SPI4_MOSISAI1_SD_ASAI2_MCK_BFMC_A22EVENTOUT
74PortEPE7TIM1_ETRUART7_RXQUADSPI_BK2_IO0FMC_D4EVENTOUT
75PortEPE8TIM1_CH1NUART7_TXQUADSPI_BK2_IO1FMC_D5EVENTOUT
76PortEPE9TIM1_CH1UART7_RTSQUADSPI_BK2_IO2FMC_D6EVENTOUT
77PortEPE10TIM1_CH2NUART7_CTSQUADSPI_BK2_IO3FMC_D7EVENTOUT
78PortEPE11TIM1_CH2SPI4_NSSSAI2_SD_BFMC_D8EVENTOUT
79PortEPE12TIM1_CH3NSPI4_SCKSAI2_SCK_BFMC_D9EVENTOUT
80PortEPE13TIM1_CH3SPI4_MISOSAI2_FS_BFMC_D10EVENTOUT
81PortEPE14TIM1_CH4SPI4_MOSISAI2_MCK_BFMC_D11EVENTOUT
82PortEPE15TIM1_BKINFMC_D12EVENTOUT
83PortFPF0I2C2_SDAFMC_A0EVENTOUT
84PortFPF1I2C2_SCLFMC_A1EVENTOUT
85PortFPF2I2C2_SMBAFMC_A2EVENTOUT
86PortFPF3FMC_A3EVENTOUTADC3_IN9
87PortFPF4FMC_A4EVENTOUTADC3_IN14
88PortFPF5FMC_A5EVENTOUTADC3_IN15
89PortFPF6TIM10_CH1SPI5_NSSSAI1_SD_BUART7_RXQUADSPI_BK1_IO3EVENTOUTADC3_IN4
90PortFPF7TIM11_CH1SPI5_SCKSAI1_MCLK_BUART7_TXQUADSPI_BK1_IO2EVENTOUTADC3_IN5
91PortFPF8SPI5_MISOSAI1_SCK_BUART7_RTSTIM13_CH1QUADSPI_BK1_IO0EVENTOUTADC3_IN6
92PortFPF9SPI5_MOSISAI1_FS_BUART7_CTSTIM14_CH1QUADSPI_BK1_IO1EVENTOUTADC3_IN7
93PortFPF10EVENTOUTADC3_IN8
94PortFPF11SPI5_MOSISAI2_SD_BFMC_SDNRASEVENTOUT
95PortFPF12FMC_A6EVENTOUT
96PortFPF13FMC_A7EVENTOUT
97PortFPF14FMC_A8EVENTOUT
98PortFPF15FMC_A9EVENTOUT
99PortGPG0FMC_A10EVENTOUT
100PortGPG1FMC_A11EVENTOUT
101PortGPG2FMC_A12EVENTOUT
102PortGPG3FMC_A13EVENTOUT
103PortGPG4FMC_A14/FMC_BA0EVENTOUT
104PortGPG5FMC_A15/FMC_BA1EVENTOUT
105PortGPG6EVENTOUT
106PortGPG7USART6_CKFMC_INTEVENTOUT
107PortGPG8USART6_RTSFMC_SDCLKEVENTOUT
108PortGPG9USART6_RXQUADSPI_BK2_IO2SAI2_FS_BSDMMC2_D0FMC_NE2/FMC_NCEEVENTOUT
109PortGPG10SAI2_SD_BSDMMC2_D1FMC_NE3EVENTOUT
110PortGPG11SDMMC2_D2EVENTOUT
111PortGPG12LPTIM1_IN1USART6_RTSSDMMC2_D3FMC_NE4EVENTOUT
112PortGPG13TRACED0LPTIM1_OUTUSART6_CTSFMC_A24EVENTOUT
113PortGPG14TRACED1LPTIM1_ETRUSART6_TXQUADSPI_BK2_IO3FMC_A25EVENTOUT
114PortGPG15USART6_CTSFMC_SDNCASEVENTOUT
115PortHPH0EVENTOUT
116PortHPH1EVENTOUT
117PortHPH2LPTIM1_IN2QUADSPI_BK2_IO0SAI2_SCK_BFMC_SDCKE0EVENTOUT
118PortHPH3QUADSPI_BK2_IO1SAI2_MCK_BFMC_SDNE0EVENTOUT
119PortHPH4I2C2_SCLOTG_HS_ULPI_NXTEVENTOUT
120PortHPH5I2C2_SDASPI5_NSSFMC_SDNWEEVENTOUT
121PortHPH6I2C2_SMBASPI5_SCKTIM12_CH1FMC_SDNE1EVENTOUT
122PortHPH7I2C3_SCLSPI5_MISOFMC_SDCKE1EVENTOUT
123PortHPH8I2C3_SDAFMC_D16EVENTOUT
124PortHPH9I2C3_SMBATIM12_CH2FMC_D17EVENTOUT
125PortHPH10TIM5_CH1FMC_D18EVENTOUT
126PortHPH11TIM5_CH2FMC_D19EVENTOUT
127PortHPH12TIM5_CH3FMC_D20EVENTOUT
128PortHPH13TIM8_CH1NUART4_TXCAN1_TXFMC_D21EVENTOUT
129PortHPH14TIM8_CH2NUART4_RXCAN1_RXFMC_D22EVENTOUT
130PortHPH15TIM8_CH3NFMC_D23EVENTOUT
131PortIPI0TIM5_CH4SPI2_NSS/I2S2_WSFMC_D24EVENTOUT
132PortIPI1TIM8_BKIN2SPI2_SCK/I2S2_CKFMC_D25EVENTOUT
133PortIPI2TIM8_CH4SPI2_MISOFMC_D26EVENTOUT
134PortIPI3TIM8_ETRSPI2_MOSI/I2S2_SDFMC_D27EVENTOUT
135PortIPI4TIM8_BKINSAI2_MCK_AFMC_NBL2EVENTOUT
136PortIPI5TIM8_CH1SAI2_SCK_AFMC_NBL3EVENTOUT
137PortIPI6TIM8_CH2SAI2_SD_AFMC_D28EVENTOUT
138PortIPI7TIM8_CH3SAI2_FS_AFMC_D29EVENTOUT
139PortIPI8EVENTOUT
140PortIPI9UART4_RXCAN1_RXFMC_D30EVENTOUT
141PortIPI10FMC_D31EVENTOUT
142PortIPI11OTG_HS_ULPI_DIREVENTOUT
143PortIPI12EVENTOUT
144PortIPI13EVENTOUT
145PortIPI14EVENTOUT
146PortIPI15EVENTOUT