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77 lines
2.6 KiB
77 lines
2.6 KiB
Floating point instructions
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===========================
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These instructions support the use of the ARM floating point coprocessor
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(on platforms such as the Pyboard which are equipped with one). The FPU
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has 32 registers known as ``s0-s31`` each of which can hold a single
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precision float. Data can be passed between the FPU registers and the
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ARM core registers with the ``vmov`` instruction.
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Note that MicroPython doesn't support passing floats to
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assembler functions, nor can you put a float into ``r0`` and expect a
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reasonable result. There are two ways to overcome this. The first is to
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use arrays, and the second is to pass and/or return integers and convert
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to and from floats in code.
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Document conventions
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--------------------
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Notation: ``Sd, Sm, Sn`` denote FPU registers, ``Rd, Rm, Rn`` denote ARM core
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registers. The latter can be any ARM core register although registers
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``R13-R15`` are unlikely to be appropriate in this context.
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Arithmetic
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----------
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* vadd(Sd, Sn, Sm) ``Sd = Sn + Sm``
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* vsub(Sd, Sn, Sm) ``Sd = Sn - Sm``
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* vneg(Sd, Sm) ``Sd = -Sm``
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* vmul(Sd, Sn, Sm) ``Sd = Sn * Sm``
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* vdiv(Sd, Sn, Sm) ``Sd = Sn / Sm``
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* vsqrt(Sd, Sm) ``Sd = sqrt(Sm)``
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Registers may be identical: ``vmul(S0, S0, S0)`` will execute ``S0 = S0*S0``
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Move between ARM core and FPU registers
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---------------------------------------
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* vmov(Sd, Rm) ``Sd = Rm``
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* vmov(Rd, Sm) ``Rd = Sm``
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The FPU has a register known as FPSCR, similar to the ARM core's APSR, which stores condition
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codes plus other data. The following instructions provide access to this.
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* vmrs(APSR\_nzcv, FPSCR)
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Move the floating-point N, Z, C, and V flags to the APSR N, Z, C, and V flags.
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This is done after an instruction such as an FPU
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comparison to enable the condition codes to be tested by the assembler
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code. The following is a more general form of the instruction.
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* vmrs(Rd, FPSCR) ``Rd = FPSCR``
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Move between FPU register and memory
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------------------------------------
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* vldr(Sd, [Rn, offset]) ``Sd = [Rn + offset]``
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* vstr(Sd, [Rn, offset]) ``[Rn + offset] = Sd``
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Where ``[Rn + offset]`` denotes the memory address obtained by adding Rn to the offset. This
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is specified in bytes. Since each float value occupies a 32 bit word, when accessing arrays of
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floats the offset must always be a multiple of four bytes.
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Data comparison
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---------------
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* vcmp(Sd, Sm)
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Compare the values in Sd and Sm and set the FPU N, Z,
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C, and V flags. This would normally be followed by ``vmrs(APSR_nzcv, FPSCR)``
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to enable the results to be tested.
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Convert between integer and float
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---------------------------------
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* vcvt\_f32\_s32(Sd, Sm) ``Sd = float(Sm)``
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* vcvt\_s32\_f32(Sd, Sm) ``Sd = int(Sm)``
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