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80 lines
3.4 KiB
80 lines
3.4 KiB
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2023 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef MICROPY_INCLUDED_MIMXRT_IRQ_H
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#define MICROPY_INCLUDED_MIMXRT_IRQ_H
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#define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003)
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static inline uint32_t query_irq(void) {
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return __get_PRIMASK();
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}
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static inline uint32_t raise_irq_pri(uint32_t pri) {
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uint32_t basepri = __get_BASEPRI();
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// If non-zero, the processor does not process any exception with a
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// priority value greater than or equal to BASEPRI.
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// When writing to BASEPRI_MAX the write goes to BASEPRI only if either:
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// - Rn is non-zero and the current BASEPRI value is 0
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// - Rn is non-zero and less than the current BASEPRI value
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pri <<= (8 - __NVIC_PRIO_BITS);
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__ASM volatile ("msr basepri_max, %0" : : "r" (pri) : "memory");
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return basepri;
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}
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// "basepri" should be the value returned from raise_irq_pri
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static inline void restore_irq_pri(uint32_t basepri) {
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__set_BASEPRI(basepri);
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}
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// IRQ priority definitions.
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//
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// Lower number implies higher interrupt priority.
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//
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// The default priority grouping used in this port is NVIC_PRIORITYGROUP_4.
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// This corresponds to 4 bits for the priority field and 0 bits for the
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// sub-priority field (which means that for all intents and purposes the
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// sub-priorities below are ignored).
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//
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// While a given interrupt is being processed, only higher priority (lower number)
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// interrupts will preempt a given interrupt. If sub-priorities are active
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// then the sub-priority determines the order that pending interrupts of
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// a given priority are executed. This is only meaningful if 2 or more
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// interrupts of the same priority are pending at the same time.
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//
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// The following interrupts are arranged from highest priority to lowest
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// priority to make it a bit easier to figure out.
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#define IRQ_PRI_SYSTICK NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 0, 0)
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#define IRQ_PRI_OTG_HS NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 6, 0)
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#define IRQ_PRI_EXTINT NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 14, 0)
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// PENDSV should be at the lowst priority so that other interrupts complete
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// before exception is raised.
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#define IRQ_PRI_PENDSV NVIC_EncodePriority(NVIC_PRIORITYGROUP_4, 15, 0)
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#endif // MICROPY_INCLUDED_MIMXRT_IRQ_H
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