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522 lines
18 KiB
522 lines
18 KiB
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013, 2014, 2015 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include "etshal.h"
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#include "c_types.h"
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#include "user_interface.h"
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#include "gpio.h"
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#include "py/runtime.h"
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#include "py/gc.h"
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#include "py/mphal.h"
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#include "extmod/virtpin.h"
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#include "modmachine.h"
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#define GET_TRIGGER(phys_port) \
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GPIO_PIN_INT_TYPE_GET(GPIO_REG_READ(GPIO_PIN_ADDR(phys_port)))
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#define SET_TRIGGER(phys_port, trig) \
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(GPIO_REG_WRITE(GPIO_PIN_ADDR(phys_port), \
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(GPIO_REG_READ(GPIO_PIN_ADDR(phys_port)) & ~GPIO_PIN_INT_TYPE_MASK) \
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| GPIO_PIN_INT_TYPE_SET(trig))) \
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#define ENABLE_OPEN_DRAIN(phys_port) \
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(GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(phys_port)), \
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GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(phys_port))) \
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| GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)))
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#define DISABLE_OPEN_DRAIN(phys_port) \
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(GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(phys_port)), \
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GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(phys_port))) \
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& ~GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE))) \
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typedef struct _pin_irq_obj_t {
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mp_obj_base_t base;
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uint16_t phys_port;
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} pin_irq_obj_t;
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STATIC void pin_intr_handler_part1(void *arg);
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STATIC void pin_intr_handler_part2(uint32_t status);
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const pyb_pin_obj_t pyb_pin_obj[16 + 1] = {
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{{&pyb_pin_type}, 0, FUNC_GPIO0, PERIPHS_IO_MUX_GPIO0_U},
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{{&pyb_pin_type}, 1, FUNC_GPIO1, PERIPHS_IO_MUX_U0TXD_U},
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{{&pyb_pin_type}, 2, FUNC_GPIO2, PERIPHS_IO_MUX_GPIO2_U},
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{{&pyb_pin_type}, 3, FUNC_GPIO3, PERIPHS_IO_MUX_U0RXD_U},
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{{&pyb_pin_type}, 4, FUNC_GPIO4, PERIPHS_IO_MUX_GPIO4_U},
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{{&pyb_pin_type}, 5, FUNC_GPIO5, PERIPHS_IO_MUX_GPIO5_U},
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{{NULL}, 0, 0, 0},
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{{NULL}, 0, 0, 0},
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{{NULL}, 0, 0, 0},
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{{&pyb_pin_type}, 9, FUNC_GPIO9, PERIPHS_IO_MUX_SD_DATA2_U},
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{{&pyb_pin_type}, 10, FUNC_GPIO10, PERIPHS_IO_MUX_SD_DATA3_U},
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{{NULL}, 0, 0, 0},
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{{&pyb_pin_type}, 12, FUNC_GPIO12, PERIPHS_IO_MUX_MTDI_U},
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{{&pyb_pin_type}, 13, FUNC_GPIO13, PERIPHS_IO_MUX_MTCK_U},
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{{&pyb_pin_type}, 14, FUNC_GPIO14, PERIPHS_IO_MUX_MTMS_U},
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{{&pyb_pin_type}, 15, FUNC_GPIO15, PERIPHS_IO_MUX_MTDO_U},
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// GPIO16 is special, belongs to different register set, and
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// otherwise handled specially.
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{{&pyb_pin_type}, 16, -1, -1},
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};
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uint8_t pin_mode[16 + 1];
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// forward declaration
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STATIC const pin_irq_obj_t pin_irq_obj[16];
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void pin_init0(void) {
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ETS_GPIO_INTR_DISABLE();
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ETS_GPIO_INTR_ATTACH(pin_intr_handler_part1, NULL);
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// disable all interrupts
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memset(&MP_STATE_PORT(pin_irq_handler)[0], 0, 16 * sizeof(mp_obj_t));
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for (int p = 0; p < 16; ++p) {
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GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, 1 << p);
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SET_TRIGGER(p, 0);
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}
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ETS_GPIO_INTR_ENABLE();
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}
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void MP_FASTCODE(pin_intr_handler_part1)(void *arg) {
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uint32_t status = GPIO_REG_READ(GPIO_STATUS_ADDRESS);
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GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, status);
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pin_intr_handler_part2(status);
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}
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void MP_FASTCODE(pin_intr_handler_part2)(uint32_t status) {
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status &= 0xffff;
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for (int p = 0; status; ++p, status >>= 1) {
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if (status & 1) {
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mp_obj_t handler = MP_STATE_PORT(pin_irq_handler)[p];
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if (handler != MP_OBJ_NULL) {
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mp_sched_schedule(handler, MP_OBJ_FROM_PTR(&pyb_pin_obj[p]));
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}
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}
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}
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}
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pyb_pin_obj_t *mp_obj_get_pin_obj(mp_obj_t pin_in) {
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if (mp_obj_get_type(pin_in) != &pyb_pin_type) {
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mp_raise_ValueError(MP_ERROR_TEXT("expecting a pin"));
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}
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pyb_pin_obj_t *self = pin_in;
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return self;
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}
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uint mp_obj_get_pin(mp_obj_t pin_in) {
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return mp_obj_get_pin_obj(pin_in)->phys_port;
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}
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void mp_hal_pin_input(mp_hal_pin_obj_t pin_id) {
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pin_mode[pin_id] = GPIO_MODE_INPUT;
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if (pin_id == 16) {
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WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1);
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WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1);
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WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1)); // input
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} else {
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const pyb_pin_obj_t *self = &pyb_pin_obj[pin_id];
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PIN_FUNC_SELECT(self->periph, self->func);
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PIN_PULLUP_DIS(self->periph);
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gpio_output_set(0, 0, 0, 1 << self->phys_port);
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}
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}
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void mp_hal_pin_output(mp_hal_pin_obj_t pin_id) {
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pin_mode[pin_id] = GPIO_MODE_OUTPUT;
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if (pin_id == 16) {
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WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1);
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WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1);
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WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1) | 1); // output
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} else {
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const pyb_pin_obj_t *self = &pyb_pin_obj[pin_id];
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PIN_FUNC_SELECT(self->periph, self->func);
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PIN_PULLUP_DIS(self->periph);
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gpio_output_set(0, 0, 1 << self->phys_port, 0);
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}
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}
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void mp_hal_pin_open_drain(mp_hal_pin_obj_t pin_id) {
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const pyb_pin_obj_t *pin = &pyb_pin_obj[pin_id];
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if (pin->phys_port == 16) {
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// configure GPIO16 as input with output register holding 0
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WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1);
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WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1);
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WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1)); // input
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WRITE_PERI_REG(RTC_GPIO_OUT, (READ_PERI_REG(RTC_GPIO_OUT) & ~1)); // out=0
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return;
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}
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ETS_GPIO_INTR_DISABLE();
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PIN_FUNC_SELECT(pin->periph, pin->func);
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ENABLE_OPEN_DRAIN(pin->phys_port);
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GPIO_REG_WRITE(GPIO_ENABLE_ADDRESS,
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GPIO_REG_READ(GPIO_ENABLE_ADDRESS) | (1 << pin->phys_port));
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ETS_GPIO_INTR_ENABLE();
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}
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int pin_get(uint pin) {
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if (pin == 16) {
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return READ_PERI_REG(RTC_GPIO_IN_DATA) & 1;
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}
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return GPIO_INPUT_GET(pin);
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}
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void pin_set(uint pin, int value) {
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if (pin == 16) {
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int out_en = (pin_mode[pin] == GPIO_MODE_OUTPUT);
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WRITE_PERI_REG(PAD_XPD_DCDC_CONF, (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | 1);
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WRITE_PERI_REG(RTC_GPIO_CONF, READ_PERI_REG(RTC_GPIO_CONF) & ~1);
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WRITE_PERI_REG(RTC_GPIO_ENABLE, (READ_PERI_REG(RTC_GPIO_ENABLE) & ~1) | out_en);
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WRITE_PERI_REG(RTC_GPIO_OUT, (READ_PERI_REG(RTC_GPIO_OUT) & ~1) | value);
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return;
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}
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uint32_t enable = 0;
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uint32_t disable = 0;
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switch (pin_mode[pin]) {
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case GPIO_MODE_INPUT:
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value = -1;
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disable = 1;
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break;
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case GPIO_MODE_OUTPUT:
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enable = 1;
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break;
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case GPIO_MODE_OPEN_DRAIN:
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if (value == -1) {
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return;
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} else if (value == 0) {
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enable = 1;
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} else {
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value = -1;
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disable = 1;
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}
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break;
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}
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enable <<= pin;
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disable <<= pin;
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if (value == -1) {
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gpio_output_set(0, 0, enable, disable);
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} else {
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gpio_output_set(value << pin, (1 - value) << pin, enable, disable);
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}
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}
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STATIC void pyb_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
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pyb_pin_obj_t *self = self_in;
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// pin name
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mp_printf(print, "Pin(%u)", self->phys_port);
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}
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// pin.init(mode, pull=None, *, value)
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STATIC mp_obj_t pyb_pin_obj_init_helper(pyb_pin_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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enum { ARG_mode, ARG_pull, ARG_value };
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT },
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{ MP_QSTR_pull, MP_ARG_OBJ, {.u_obj = mp_const_none}},
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{ MP_QSTR_value, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL}},
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};
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// parse args
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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// get io mode
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uint mode = args[ARG_mode].u_int;
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// get pull mode
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uint pull = GPIO_PULL_NONE;
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if (args[ARG_pull].u_obj != mp_const_none) {
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pull = mp_obj_get_int(args[ARG_pull].u_obj);
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}
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// get initial value
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int value;
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if (args[ARG_value].u_obj == MP_OBJ_NULL) {
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value = -1;
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} else {
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value = mp_obj_is_true(args[ARG_value].u_obj);
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}
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// save the mode
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pin_mode[self->phys_port] = mode;
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// configure the GPIO as requested
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if (self->phys_port == 16) {
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// only pull-down seems to be supported by the hardware, and
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// we only expose pull-up behaviour in software
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if (pull != GPIO_PULL_NONE) {
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mp_raise_ValueError(MP_ERROR_TEXT("Pin(16) doesn't support pull"));
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}
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} else {
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DISABLE_OPEN_DRAIN(self->phys_port);
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PIN_FUNC_SELECT(self->periph, self->func);
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#if 0
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// Removed in SDK 1.1.0
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if ((pull & GPIO_PULL_DOWN) == 0) {
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PIN_PULLDWN_DIS(self->periph);
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}
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#endif
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if ((pull & GPIO_PULL_UP) == 0) {
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PIN_PULLUP_DIS(self->periph);
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}
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#if 0
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if ((pull & GPIO_PULL_DOWN) != 0) {
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PIN_PULLDWN_EN(self->periph);
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}
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#endif
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if ((pull & GPIO_PULL_UP) != 0) {
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PIN_PULLUP_EN(self->periph);
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}
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}
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pin_set(self->phys_port, value);
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return mp_const_none;
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}
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// constructor(id, ...)
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mp_obj_t mp_pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
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mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
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// get the wanted pin object
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int wanted_pin = mp_obj_get_int(args[0]);
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pyb_pin_obj_t *pin = NULL;
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if (0 <= wanted_pin && wanted_pin < MP_ARRAY_SIZE(pyb_pin_obj)) {
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pin = (pyb_pin_obj_t *)&pyb_pin_obj[wanted_pin];
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}
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if (pin == NULL || pin->base.type == NULL) {
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mp_raise_ValueError(MP_ERROR_TEXT("invalid pin"));
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}
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if (n_args > 1 || n_kw > 0) {
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// pin mode given, so configure this GPIO
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mp_map_t kw_args;
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mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
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pyb_pin_obj_init_helper(pin, n_args - 1, args + 1, &kw_args);
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}
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return (mp_obj_t)pin;
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}
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// fast method for getting/setting pin value
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STATIC mp_obj_t pyb_pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) {
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mp_arg_check_num(n_args, n_kw, 0, 1, false);
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pyb_pin_obj_t *self = self_in;
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if (n_args == 0) {
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// get pin
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return MP_OBJ_NEW_SMALL_INT(pin_get(self->phys_port));
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} else {
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// set pin
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pin_set(self->phys_port, mp_obj_is_true(args[0]));
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return mp_const_none;
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}
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}
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// pin.init(mode, pull)
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STATIC mp_obj_t pyb_pin_obj_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
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return pyb_pin_obj_init_helper(args[0], n_args - 1, args + 1, kw_args);
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}
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MP_DEFINE_CONST_FUN_OBJ_KW(pyb_pin_init_obj, 1, pyb_pin_obj_init);
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// pin.value([value])
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STATIC mp_obj_t pyb_pin_value(size_t n_args, const mp_obj_t *args) {
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return pyb_pin_call(args[0], n_args - 1, 0, args + 1);
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_pin_value_obj, 1, 2, pyb_pin_value);
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STATIC mp_obj_t pyb_pin_off(mp_obj_t self_in) {
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pyb_pin_obj_t *self = self_in;
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pin_set(self->phys_port, 0);
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_pin_off_obj, pyb_pin_off);
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STATIC mp_obj_t pyb_pin_on(mp_obj_t self_in) {
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pyb_pin_obj_t *self = self_in;
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pin_set(self->phys_port, 1);
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_pin_on_obj, pyb_pin_on);
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// pin.irq(handler=None, trigger=IRQ_FALLING|IRQ_RISING, hard=False)
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STATIC mp_obj_t pyb_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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enum { ARG_handler, ARG_trigger, ARG_hard };
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_handler, MP_ARG_OBJ, {.u_obj = mp_const_none} },
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{ MP_QSTR_trigger, MP_ARG_INT, {.u_int = GPIO_PIN_INTR_POSEDGE | GPIO_PIN_INTR_NEGEDGE} },
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{ MP_QSTR_hard, MP_ARG_BOOL, {.u_bool = false} },
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};
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pyb_pin_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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if (self->phys_port >= 16) {
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mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("pin does not have IRQ capabilities"));
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}
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if (args[ARG_hard].u_bool) {
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mp_raise_ValueError(MP_ERROR_TEXT("hard IRQ not supported"));
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}
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if (n_args > 1 || kw_args->used != 0) {
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// configure irq
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mp_obj_t handler = args[ARG_handler].u_obj;
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uint32_t trigger = args[ARG_trigger].u_int;
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if (handler == mp_const_none) {
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handler = MP_OBJ_NULL;
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trigger = 0;
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}
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ETS_GPIO_INTR_DISABLE();
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MP_STATE_PORT(pin_irq_handler)[self->phys_port] = handler;
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SET_TRIGGER(self->phys_port, trigger);
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GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, 1 << self->phys_port);
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ETS_GPIO_INTR_ENABLE();
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}
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// return the irq object
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return MP_OBJ_FROM_PTR(&pin_irq_obj[self->phys_port]);
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_pin_irq_obj, 1, pyb_pin_irq);
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STATIC mp_uint_t pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode);
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STATIC mp_uint_t pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
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(void)errcode;
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pyb_pin_obj_t *self = self_in;
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switch (request) {
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case MP_PIN_READ: {
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return pin_get(self->phys_port);
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}
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case MP_PIN_WRITE: {
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pin_set(self->phys_port, arg);
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return 0;
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}
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}
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return -1;
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}
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STATIC const mp_rom_map_elem_t pyb_pin_locals_dict_table[] = {
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// instance methods
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{ MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_pin_init_obj) },
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{ MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&pyb_pin_value_obj) },
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{ MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&pyb_pin_off_obj) },
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{ MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&pyb_pin_on_obj) },
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{ MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&pyb_pin_irq_obj) },
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// class constants
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{ MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(GPIO_MODE_INPUT) },
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{ MP_ROM_QSTR(MP_QSTR_OUT), MP_ROM_INT(GPIO_MODE_OUTPUT) },
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{ MP_ROM_QSTR(MP_QSTR_OPEN_DRAIN), MP_ROM_INT(GPIO_MODE_OPEN_DRAIN) },
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{ MP_ROM_QSTR(MP_QSTR_PULL_UP), MP_ROM_INT(GPIO_PULL_UP) },
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// { MP_ROM_QSTR(MP_QSTR_PULL_DOWN), MP_ROM_INT(GPIO_PULL_DOWN) },
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// IRQ triggers, can be or'd together
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{ MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(GPIO_PIN_INTR_POSEDGE) },
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{ MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(GPIO_PIN_INTR_NEGEDGE) },
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};
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STATIC MP_DEFINE_CONST_DICT(pyb_pin_locals_dict, pyb_pin_locals_dict_table);
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STATIC const mp_pin_p_t pin_pin_p = {
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.ioctl = pin_ioctl,
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};
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MP_DEFINE_CONST_OBJ_TYPE(
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pyb_pin_type,
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MP_QSTR_Pin,
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MP_TYPE_FLAG_NONE,
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make_new, mp_pin_make_new,
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print, pyb_pin_print,
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call, pyb_pin_call,
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protocol, &pin_pin_p,
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locals_dict, &pyb_pin_locals_dict
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);
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/******************************************************************************/
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// Pin IRQ object
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STATIC const mp_obj_type_t pin_irq_type;
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STATIC const pin_irq_obj_t pin_irq_obj[16] = {
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{{&pin_irq_type}, 0},
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{{&pin_irq_type}, 1},
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{{&pin_irq_type}, 2},
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{{&pin_irq_type}, 3},
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{{&pin_irq_type}, 4},
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{{&pin_irq_type}, 5},
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{{&pin_irq_type}, 6},
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{{&pin_irq_type}, 7},
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{{&pin_irq_type}, 8},
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{{&pin_irq_type}, 9},
|
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{{&pin_irq_type}, 10},
|
|
{{&pin_irq_type}, 11},
|
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{{&pin_irq_type}, 12},
|
|
{{&pin_irq_type}, 13},
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{{&pin_irq_type}, 14},
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{{&pin_irq_type}, 15},
|
|
};
|
|
|
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STATIC mp_obj_t pin_irq_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) {
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pin_irq_obj_t *self = self_in;
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mp_arg_check_num(n_args, n_kw, 0, 0, false);
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pin_intr_handler_part2(1 << self->phys_port);
|
|
return mp_const_none;
|
|
}
|
|
|
|
STATIC mp_obj_t pin_irq_trigger(size_t n_args, const mp_obj_t *args) {
|
|
pin_irq_obj_t *self = args[0];
|
|
uint32_t orig_trig = GET_TRIGGER(self->phys_port);
|
|
if (n_args == 2) {
|
|
// set trigger
|
|
SET_TRIGGER(self->phys_port, mp_obj_get_int(args[1]));
|
|
}
|
|
// return original trigger value
|
|
return MP_OBJ_NEW_SMALL_INT(orig_trig);
|
|
}
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_irq_trigger_obj, 1, 2, pin_irq_trigger);
|
|
|
|
STATIC const mp_rom_map_elem_t pin_irq_locals_dict_table[] = {
|
|
{ MP_ROM_QSTR(MP_QSTR_trigger), MP_ROM_PTR(&pin_irq_trigger_obj) },
|
|
};
|
|
|
|
STATIC MP_DEFINE_CONST_DICT(pin_irq_locals_dict, pin_irq_locals_dict_table);
|
|
|
|
STATIC MP_DEFINE_CONST_OBJ_TYPE(
|
|
pin_irq_type,
|
|
MP_QSTR_IRQ,
|
|
MP_TYPE_FLAG_NONE,
|
|
call, pin_irq_call,
|
|
locals_dict, &pin_irq_locals_dict
|
|
);
|
|
|
|
MP_REGISTER_ROOT_POINTER(mp_obj_t pin_irq_handler[16]);
|
|
|