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184 lines
7.9 KiB
184 lines
7.9 KiB
/*
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* This file is part of the Micro Python project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013, 2014 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#define FTM0 ((FTM_TypeDef *)&FTM0_SC)
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#define FTM1 ((FTM_TypeDef *)&FTM1_SC)
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#define FTM2 ((FTM_TypeDef *)&FTM2_SC)
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typedef struct {
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volatile uint32_t CSC; // Channel x Status And Control
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volatile uint32_t CV; // Channel x Value
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} FTM_ChannelTypeDef;
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typedef struct {
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volatile uint32_t SC; // Status And Control
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volatile uint32_t CNT; // Counter
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volatile uint32_t MOD; // Modulo
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FTM_ChannelTypeDef channel[8];
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volatile uint32_t CNTIN; // Counter Initial Value
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volatile uint32_t STATUS; // Capture And Compare Status
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volatile uint32_t MODE; // Features Mode Selection
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volatile uint32_t SYNC; // Synchronization
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volatile uint32_t OUTINIT; // Initial State For Channels Output
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volatile uint32_t OUTMASK; // Output Mask
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volatile uint32_t COMBINE; // Function For Linked Channels
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volatile uint32_t DEADTIME; // Deadtime Insertion Control
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volatile uint32_t EXTTRIG; // FTM External Trigger
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volatile uint32_t POL; // Channels Polarity
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volatile uint32_t FMS; // Fault Mode Status
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volatile uint32_t FILTER; // Input Capture Filter Control
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volatile uint32_t FLTCTRL; // Fault Control
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volatile uint32_t QDCTRL; // Quadrature Decoder Control And Status
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volatile uint32_t CONF; // Configuration
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volatile uint32_t FLTPOL; // FTM Fault Input Polarity
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volatile uint32_t SYNCONF; // Synchronization Configuration
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volatile uint32_t INVCTRL; // FTM Inverting Control
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volatile uint32_t SWOCTRL; // FTM Software Output Control
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volatile uint32_t PWMLOAD; // FTM PWM Load
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} FTM_TypeDef;
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typedef struct {
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uint32_t PrescalerShift; // Sets the prescaler to 1 << PrescalerShift
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uint32_t CounterMode; // One of FTM_COUNTERMODE_xxx
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uint32_t Period; // Specifies the Period for determining timer overflow
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} FTM_Base_InitTypeDef;
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typedef struct {
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uint32_t OCMode; // One of FTM_OCMODE_xxx
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uint32_t Pulse; // Specifies initial pulse width (0-0xffff)
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uint32_t OCPolarity; // One of FTM_OCPOLRITY_xxx
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} FTM_OC_InitTypeDef;
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typedef struct {
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uint32_t ICPolarity; // Specifies Rising/Falling/Both
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} FTM_IC_InitTypeDef;
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#define IS_FTM_INSTANCE(INSTANCE) (((INSTANCE) == FTM0) || \
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((INSTANCE) == FTM1) || \
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((INSTANCE) == FTM2))
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#define IS_FTM_PRESCALERSHIFT(PRESCALERSHIFT) (((PRESCALERSHIFT) & ~7) == 0)
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#define FTM_COUNTERMODE_UP (0)
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#define FTM_COUNTERMODE_CENTER (FTM_SC_CPWMS)
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#define IS_FTM_COUNTERMODE(MODE) (((MODE) == FTM_COUNTERMODE_UP) ||\
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((MODE) == FTM_COUNTERMODE_CENTER))
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#define IS_FTM_PERIOD(PERIOD) (((PERIOD) & 0xFFFF0000) == 0)
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#define FTM_CSC_CHF 0x80
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#define FTM_CSC_CHIE 0x40
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#define FTM_CSC_MSB 0x20
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#define FTM_CSC_MSA 0x10
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#define FTM_CSC_ELSB 0x08
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#define FTM_CSC_ELSA 0x04
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#define FTM_CSC_DMA 0x01
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#define FTM_OCMODE_TIMING (0)
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#define FTM_OCMODE_ACTIVE (FTM_CSC_MSA | FTM_CSC_ELSB | FTM_CSC_ELSA)
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#define FTM_OCMODE_INACTIVE (FTM_CSC_MSA | FTM_CSC_ELSB)
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#define FTM_OCMODE_TOGGLE (FTM_CSC_MSA | FTM_CSC_ELSA)
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#define FTM_OCMODE_PWM1 (FTM_CSC_MSB | FTM_CSC_ELSB)
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#define FTM_OCMODE_PWM2 (FTM_CSC_MSB | FTM_CSC_ELSA)
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#define IS_FTM_OC_MODE(mode) ((mode) == FTM_OCMODE_TIMING || \
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(mode) == FTM_OCMODE_ACTIVE || \
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(mode) == FTM_OCMODE_INACTIVE || \
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(mode) == FTM_OCMODE_TOGGLE )
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#define IS_FTM_PWM_MODE(mode) ((mode) == FTM_OCMODE_PWM1 || \
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(mode) == FTM_OCMODE_PWM2)
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#define IS_FTM_CHANNEL(channel) (((channel) & ~7) == 0)
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#define IS_FTM_PULSE(pulse) (((pulse) & ~0xffff) == 0)
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#define FTM_OCPOLARITY_HIGH (0)
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#define FTM_OCPOLARITY_LOW (1)
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#define IS_FTM_OC_POLARITY(polarity) ((polarity) == FTM_OCPOLARITY_HIGH || \
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(polarity) == FTM_OCPOLARITY_LOW)
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#define FTM_ICPOLARITY_RISING (FTM_CSC_ELSA)
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#define FTM_ICPOLARITY_FALLING (FTM_CSC_ELSB)
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#define FTM_ICPOLARITY_BOTH (FTM_CSC_ELSA | FTM_CSC_ELSB)
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#define IS_FTM_IC_POLARITY(polarity) ((polarity) == FTM_ICPOLARITY_RISING || \
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(polarity) == FTM_ICPOLARITY_FALLING || \
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(polarity) == FTM_ICPOLARITY_BOTH)
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typedef enum {
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HAL_FTM_STATE_RESET = 0x00,
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HAL_FTM_STATE_READY = 0x01,
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HAL_FTM_STATE_BUSY = 0x02,
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} HAL_FTM_State;
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typedef struct {
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FTM_TypeDef *Instance;
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FTM_Base_InitTypeDef Init;
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HAL_FTM_State State;
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} FTM_HandleTypeDef;
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#define __HAL_FTM_GET_TOF_FLAG(HANDLE) (((HANDLE)->Instance->SC & FTM_SC_TOF) != 0)
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#define __HAL_FTM_CLEAR_TOF_FLAG(HANDLE) ((HANDLE)->Instance->SC &= ~FTM_SC_TOF)
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#define __HAL_FTM_GET_TOF_IT(HANDLE) (((HANDLE)->Instance->SC & FTM_SC_TOIE) != 0)
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#define __HAL_FTM_ENABLE_TOF_IT(HANDLE) ((HANDLE)->Instance->SC |= FTM_SC_TOIE)
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#define __HAL_FTM_DISABLE_TOF_IT(HANDLE) ((HANDLE)->Instance->SC &= ~FTM_SC_TOIE)
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#define __HAL_FTM_GET_CH_FLAG(HANDLE, CH) (((HANDLE)->Instance->channel[CH].CSC & FTM_CSC_CHF) != 0)
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#define __HAL_FTM_CLEAR_CH_FLAG(HANDLE, CH) ((HANDLE)->Instance->channel[CH].CSC &= ~FTM_CSC_CHF)
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#define __HAL_FTM_GET_CH_IT(HANDLE, CH) (((HANDLE)->Instance->channel[CH].CSC & FTM_CSC_CHIE) != 0)
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#define __HAL_FTM_ENABLE_CH_IT(HANDLE, CH) ((HANDLE)->Instance->channel[CH].CSC |= FTM_CSC_CHIE)
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#define __HAL_FTM_DISABLE_CH_IT(HANDLE, CH) ((HANDLE)->Instance->channel[CH].CSC &= ~FTM_CSC_CHIE)
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void HAL_FTM_Base_Init(FTM_HandleTypeDef *hftm);
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void HAL_FTM_Base_Start(FTM_HandleTypeDef *hftm);
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void HAL_FTM_Base_Start_IT(FTM_HandleTypeDef *hftm);
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void HAL_FTM_Base_DeInit(FTM_HandleTypeDef *hftm);
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void HAL_FTM_OC_Init(FTM_HandleTypeDef *hftm);
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void HAL_FTM_OC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef* sConfig, uint32_t channel);
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void HAL_FTM_OC_Start(FTM_HandleTypeDef *hftm, uint32_t channel);
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void HAL_FTM_OC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel);
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void HAL_FTM_OC_DeInit(FTM_HandleTypeDef *hftm);
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void HAL_FTM_PWM_Init(FTM_HandleTypeDef *hftm);
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void HAL_FTM_PWM_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef* sConfig, uint32_t channel);
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void HAL_FTM_PWM_Start(FTM_HandleTypeDef *hftm, uint32_t channel);
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void HAL_FTM_PWM_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel);
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void HAL_FTM_PWM_DeInit(FTM_HandleTypeDef *hftm);
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void HAL_FTM_IC_Init(FTM_HandleTypeDef *hftm);
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void HAL_FTM_IC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_IC_InitTypeDef* sConfig, uint32_t channel);
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void HAL_FTM_IC_Start(FTM_HandleTypeDef *hftm, uint32_t channel);
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void HAL_FTM_IC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel);
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void HAL_FTM_IC_DeInit(FTM_HandleTypeDef *hftm);
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