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MEMORY
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{
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ITCM (rwx): ORIGIN = 0x00000000, LENGTH = 0x00080000 /* 512 Kib */
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DTCM (rwx): ORIGIN = 0x20000000, LENGTH = 0x00080000 /* 512 Kib */
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RAM (rwx): ORIGIN = 0x20200000, LENGTH = 0x00080000 /* 512 Kib */
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FLASH (rx): ORIGIN = 0x60000000, LENGTH = 0x001FFFF0 /* 1984 Kib */
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}
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ENTRY(Reset_Handler);
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_stack_size = 4K;
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SECTIONS
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{
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.text : ALIGN(8) {
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FILL(0xFFFFFFFF);
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/* place flash config at beginning of flash device */
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KEEP(*(.flash_config));
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/* IVT must be located at +4 Kbyte offset from base address of flash. */
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. = ORIGIN(FLASH) + 0x1000;
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KEEP(*(.ivt));
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. = ORIGIN(FLASH) + 0x1020;
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KEEP(*(.boot_data));
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. = ORIGIN(FLASH) + 0x2000;
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_svectors = ABSOLUTE(.);
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KEEP(*(.isr_vector));
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. = ALIGN(8);
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*(.text.Reset_Handler);
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. = ALIGN(8);
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_stext = .;
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*(.text*);
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*(.rodata* .constdata*);
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. = ALIGN(8);
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_etext = .;
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} > FLASH
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.tinygo_stacksizes : ALIGN(8) {
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*(.tinygo_stacksizes);
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. = ALIGN(8);
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} > FLASH
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.text.padding (NOLOAD) : {
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. = ALIGN(32768);
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} > ITCM
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.stack (NOLOAD) : {
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. = ALIGN(8);
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. += _stack_size;
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_stack_top = .;
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} > DTCM
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.data : ALIGN(8) {
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FILL(0xFFFFFFFF);
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_sdata = .;
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*(.data*);
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. = ALIGN(8);
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_edata = .;
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} > DTCM AT > FLASH
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.bss : ALIGN(8) {
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_sbss = .;
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*(.bss*);
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*(COMMON);
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. = ALIGN(8);
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_ebss = .;
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} > DTCM AT > DTCM
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/DISCARD/ : {
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*(.ARM.exidx*); /* causes spurious 'undefined reference' errors */
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}
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_sidata = LOADADDR(.data);
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_heap_start = ORIGIN(RAM);
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_heap_end = ORIGIN(RAM) + LENGTH(RAM);
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_globals_start = _sdata;
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_globals_end = _ebss;
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_image_size = SIZEOF(.text) + SIZEOF(.tinygo_stacksizes) + SIZEOF(.data);
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/* TODO: link .text to ITCM */
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_itcm_blocks = (0 + 0x7FFF) >> 15;
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_flexram_cfg = 0xAAAAAAAA | ((1 << (_itcm_blocks * 2)) - 1);
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}
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