Browse Source

fe310: increase CPU frequency from 16MHz to 320MHz

This chip can run so much faster! Let's update the default frequency.

Also, change the UART implementation to be more fexible regarding the
clock frequency.
pull/2135/head
Ayke van Laethem 3 years ago
committed by Ron Evans
parent
commit
3f89fa0bee
  1. 16
      src/machine/machine_fe310.go
  2. 12
      src/runtime/runtime_fe310.go

16
src/machine/machine_fe310.go

@ -9,7 +9,7 @@ import (
)
func CPUFrequency() uint32 {
return 16000000
return 320000000 // 320MHz
}
const (
@ -61,9 +61,17 @@ var (
)
func (uart *UART) Configure(config UARTConfig) {
// Assuming a 16Mhz Crystal (which is Y1 on the HiFive1), the divisor for a
// 115200 baud rate is 138.
sifive.UART0.DIV.Set(138)
if config.BaudRate == 0 {
config.BaudRate = 115200
}
// The divisor is:
// fbaud = fin / (div + 1)
// Restating to get the divisor:
// div = fin / fbaud - 1
// But we're using integers, so we should take care of rounding:
// div = (fin + fbaud/2) / fbaud - 1
divisor := (CPUFrequency()+config.BaudRate/2)/config.BaudRate - 1
sifive.UART0.DIV.Set(divisor)
sifive.UART0.TXCTRL.Set(sifive.UART_TXCTRL_ENABLE)
sifive.UART0.RXCTRL.Set(sifive.UART_RXCTRL_ENABLE)
sifive.UART0.IE.Set(sifive.UART_IE_RXWM) // enable the receive interrupt (only)

12
src/runtime/runtime_fe310.go

@ -79,12 +79,12 @@ func handleInterrupt() {
// initPeripherals configures periperhals the way the runtime expects them.
func initPeripherals() {
// Make sure the HFROSC is on
sifive.PRCI.HFROSCCFG.SetBits(sifive.PRCI_HFROSCCFG_ENABLE)
// Run off 16 MHz Crystal for accuracy.
sifive.PRCI.PLLCFG.SetBits(sifive.PRCI_PLLCFG_REFSEL | sifive.PRCI_PLLCFG_BYPASS)
sifive.PRCI.PLLCFG.SetBits(sifive.PRCI_PLLCFG_SEL)
// Configure PLL to output 320MHz.
// R=2: divide 16MHz to 8MHz
// F=80: multiply 8MHz by 80 to get 640MHz (80/2-1=39)
// Q=2: divide 640MHz by 2 to get 320MHz
// This makes the main CPU run at 320MHz.
sifive.PRCI.PLLCFG.Set(sifive.PRCI_PLLCFG_PLLR_R2<<sifive.PRCI_PLLCFG_PLLR_Pos | 39<<sifive.PRCI_PLLCFG_PLLF_Pos | sifive.PRCI_PLLCFG_PLLQ_Q2<<sifive.PRCI_PLLCFG_PLLQ_Pos | sifive.PRCI_PLLCFG_SEL | sifive.PRCI_PLLCFG_REFSEL)
// Turn off HFROSC to save power
sifive.PRCI.HFROSCCFG.ClearBits(sifive.PRCI_HFROSCCFG_ENABLE)

Loading…
Cancel
Save