mirror of https://github.com/tinygo-org/tinygo.git
ardnew
4 years ago
committed by
Ron Evans
Ron Evans
4 changed files with 425 additions and 4 deletions
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// +build mimxrt1062
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package machine |
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import ( |
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"device/nxp" |
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"runtime/interrupt" |
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"runtime/volatile" |
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) |
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// UART peripheral abstraction layer for the MIMXRT1062
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type UART struct { |
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Bus *nxp.LPUART_Type |
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Buffer *RingBuffer |
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Interrupt interrupt.Interrupt |
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// these hold the input selector ("daisy chain") values that select which pins
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// are connected to the LPUART device, and should be defined where the UART
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// instance is declared. see the godoc comments on type muxSelect for more
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// details.
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muxRX, muxTX muxSelect |
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// these are copied from UARTConfig, during (*UART).Configure(UARTConfig), and
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// should be considered read-only for internal reference (i.e., modifying them
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// will have no desirable effect).
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rx, tx Pin |
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baud uint32 |
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// auxiliary state data used internally
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configured bool |
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msbFirst bool |
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transmitting volatile.Register32 |
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txBuffer *RingBuffer |
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} |
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func (uart *UART) isTransmitting() bool { return uart.transmitting.Get() != 0 } |
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func (uart *UART) startTransmitting() { uart.transmitting.Set(1) } |
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func (uart *UART) stopTransmitting() { uart.transmitting.Set(0) } |
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func (uart *UART) resetTransmitting() { |
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uart.stopTransmitting() |
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uart.Bus.GLOBAL.SetBits(nxp.LPUART_GLOBAL_RST) |
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uart.Bus.GLOBAL.ClearBits(nxp.LPUART_GLOBAL_RST) |
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} |
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// Configure initializes a UART with the given UARTConfig and other default
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// settings.
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func (uart *UART) Configure(config UARTConfig) { |
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const defaultUartFreq = 115200 |
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// use default baud rate if not specified
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if config.BaudRate == 0 { |
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config.BaudRate = defaultUartFreq |
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} |
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uart.baud = config.BaudRate |
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// use default UART pins if not specified
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if config.RX == 0 && config.TX == 0 { |
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config.RX = UART_RX_PIN |
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config.TX = UART_TX_PIN |
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} |
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uart.rx = config.RX |
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uart.tx = config.TX |
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// configure the mux and pad control registers
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uart.rx.Configure(PinConfig{Mode: PinModeUARTRX}) |
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uart.tx.Configure(PinConfig{Mode: PinModeUARTTX}) |
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// configure the mux input selector
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uart.muxRX.connect() |
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uart.muxTX.connect() |
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// reset all internal logic and registers
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uart.resetTransmitting() |
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// determine the baud rate and over-sample divisors
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sbr, osr := uart.getBaudRateDivisor(uart.baud) |
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// for now we assume some configuration. in particular:
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// Data bits -> 8-bit
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// Parity bit -> None (parity bit generation disabled)
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// Stop bits -> 1 stop bit
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// MSB first -> false
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// RX idle type -> idle count starts after start bit
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// RX idle config -> 1 idle character
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// RX RTS enabled -> false
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// TX CTS enabled -> false
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// set the baud rate, over-sample configuration, stop bits
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baudBits := (((osr - 1) << nxp.LPUART_BAUD_OSR_Pos) & nxp.LPUART_BAUD_OSR_Msk) | |
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((sbr << nxp.LPUART_BAUD_SBR_Pos) & nxp.LPUART_BAUD_SBR_Msk) | |
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((nxp.LPUART_BAUD_SBNS_SBNS_0 << nxp.LPUART_BAUD_SBNS_Pos) & nxp.LPUART_BAUD_SBNS_Msk) |
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if osr <= 8 { |
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// if OSR less than or equal to 8, we must enable sampling on both edges
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baudBits |= nxp.LPUART_BAUD_BOTHEDGE |
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} |
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uart.Bus.BAUD.Set(baudBits) |
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uart.Bus.PINCFG.Set(0) // disable triggers
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// use 8 data bits, disable parity, use 1 idle char, and idle count starts
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// after start bit
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ctrlBits := uint32(((nxp.LPUART_CTRL_M_M_0 << nxp.LPUART_CTRL_M_Pos) & nxp.LPUART_CTRL_M_Msk) | |
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((nxp.LPUART_CTRL_PE_PE_0 << nxp.LPUART_CTRL_PE_Pos) & nxp.LPUART_CTRL_PE_Msk) | |
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((nxp.LPUART_CTRL_ILT_ILT_0 << nxp.LPUART_CTRL_ILT_Pos) & nxp.LPUART_CTRL_ILT_Msk) | |
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((nxp.LPUART_CTRL_IDLECFG_IDLECFG_0 << nxp.LPUART_CTRL_IDLECFG_Pos) & nxp.LPUART_CTRL_IDLECFG_Msk)) |
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uart.Bus.CTRL.Set(ctrlBits) |
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rxSize, txSize := uart.getFIFOSize() |
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rxWater := rxSize >> 1 |
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if rxWater > uint32(nxp.LPUART_FIFO_RXFIFOSIZE_Msk>>nxp.LPUART_FIFO_RXFIFOSIZE_Pos) { |
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rxWater = uint32(nxp.LPUART_FIFO_RXFIFOSIZE_Msk >> nxp.LPUART_FIFO_RXFIFOSIZE_Pos) |
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} |
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txWater := txSize >> 1 |
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if txWater > uint32(nxp.LPUART_FIFO_TXFIFOSIZE_Msk>>nxp.LPUART_FIFO_TXFIFOSIZE_Pos) { |
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txWater = uint32(nxp.LPUART_FIFO_TXFIFOSIZE_Msk >> nxp.LPUART_FIFO_TXFIFOSIZE_Pos) |
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} |
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uart.Bus.WATER.Set( |
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((rxWater << nxp.LPUART_WATER_RXWATER_Pos) & nxp.LPUART_WATER_RXWATER_Msk) | |
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((txWater << nxp.LPUART_WATER_TXWATER_Pos) & nxp.LPUART_WATER_TXWATER_Msk)) |
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// enable TX/RX FIFOs
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uart.Bus.FIFO.SetBits(nxp.LPUART_FIFO_RXFE | nxp.LPUART_FIFO_TXFE) |
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// flush TX/RX FIFOs
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uart.Bus.FIFO.SetBits(nxp.LPUART_FIFO_RXFLUSH | nxp.LPUART_FIFO_TXFLUSH) |
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uart.Bus.MODIR.SetBits( // set the CTS configuration/TX CTS source
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((nxp.LPUART_MODIR_TXCTSC_TXCTSC_0 << nxp.LPUART_MODIR_TXCTSC_Pos) & nxp.LPUART_MODIR_TXCTSC_Msk) | |
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((nxp.LPUART_MODIR_TXCTSSRC_TXCTSSRC_0 << nxp.LPUART_MODIR_TXCTSSRC_Pos) & nxp.LPUART_MODIR_TXCTSSRC_Msk)) |
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// clear all status flags
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stat := uint32(nxp.LPUART_STAT_RXEDGIF_Msk | nxp.LPUART_STAT_IDLE_Msk | nxp.LPUART_STAT_OR_Msk | |
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nxp.LPUART_STAT_NF_Msk | nxp.LPUART_STAT_FE_Msk | nxp.LPUART_STAT_PF_Msk | |
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nxp.LPUART_STAT_LBKDIF_Msk | nxp.LPUART_STAT_MA1F_Msk | nxp.LPUART_STAT_MA2F_Msk) |
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// set data bits order
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if uart.msbFirst { |
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stat |= nxp.LPUART_STAT_MSBF |
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} else { |
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stat &^= nxp.LPUART_STAT_MSBF |
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} |
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uart.Bus.STAT.SetBits(stat) |
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// enable RX/TX functions
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uart.Bus.CTRL.SetBits(nxp.LPUART_CTRL_TE | nxp.LPUART_CTRL_RE) |
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// enable RX IRQ
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uart.Interrupt.SetPriority(0xc0) |
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uart.Interrupt.Enable() |
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uart.configured = true |
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} |
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func (uart *UART) Disable() { |
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// first ensure the device is enabled
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if uart.configured { |
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// wait for any buffered data to send
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uart.Flush() |
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// stop trapping RX interrupts
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uart.Interrupt.Disable() |
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// reset all internal registers
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uart.resetTransmitting() |
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// disable RX/TX functions
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uart.Bus.CTRL.ClearBits(nxp.LPUART_CTRL_TE | nxp.LPUART_CTRL_RE) |
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// put pins back into GPIO mode
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uart.rx.Configure(PinConfig{Mode: PinInputPullUp}) |
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uart.tx.Configure(PinConfig{Mode: PinInputPullUp}) |
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} |
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uart.configured = false |
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} |
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// Flush blocks the calling goroutine until all data in the output buffer has
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// been written out.
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func (uart *UART) Flush() { |
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for uart.isTransmitting() { |
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} |
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} |
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func (uart *UART) WriteByte(c byte) error { |
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if nil == uart.txBuffer { |
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uart.txBuffer = NewRingBuffer() |
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} |
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uart.startTransmitting() |
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for !uart.txBuffer.Put(c) { |
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} |
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uart.Bus.CTRL.SetBits(nxp.LPUART_CTRL_TIE) |
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return nil |
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} |
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// getBaudRateDivisor finds the greatest over-sampling factor (4..32) and
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// corresponding baud rate divisor (1..8191) that best partition a given baud
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// rate into equal intervals.
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//
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// This is an integral (i.e. non-floating point) port of the logic at the
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// beginning of:
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// void HardwareSerial::begin(uint32_t baud, uint16_t format)
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// (from Teensyduino: `cores/teensy4/HardwareSerial.cpp`)
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//
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// We don't want to risk using floating point here in the machine package in
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// case it gets called before the FPU or interrupts are ready (e.g., init()).
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func (uart *UART) getBaudRateDivisor(baudRate uint32) (sbr uint32, osr uint32) { |
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const clock = 24000000 // UART is muxed to 24 MHz OSC
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err := uint32(0xFFFFFFFF) |
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sbr, osr = 0, 0 |
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for o := uint32(4); o <= 32; o++ { |
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s := ((clock*10)/(baudRate*o) + 5) / 10 |
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if s == 0 { |
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s = 1 |
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} |
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b := clock / (s * o) |
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var e uint32 |
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if b > baudRate { |
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e = b - baudRate |
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} else { |
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e = baudRate - b |
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} |
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if e <= err { |
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err = e |
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osr = o |
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sbr = s |
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} |
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} |
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return sbr, osr |
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} |
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func (uart *UART) getFIFOSize() (rx, tx uint32) { |
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fifo := uart.Bus.FIFO.Get() |
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rx = uint32(1) << ((fifo & nxp.LPUART_FIFO_RXFIFOSIZE_Msk) >> nxp.LPUART_FIFO_RXFIFOSIZE_Pos) |
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if rx > 1 { |
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rx <<= 1 |
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} |
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tx = uint32(1) << ((fifo & nxp.LPUART_FIFO_TXFIFOSIZE_Msk) >> nxp.LPUART_FIFO_TXFIFOSIZE_Pos) |
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if tx > 1 { |
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tx <<= 1 |
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} |
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return rx, tx |
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} |
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func (uart *UART) getStatus() uint32 { |
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return uart.Bus.STAT.Get() | |
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((uart.Bus.FIFO.Get() & uint32(nxp.LPUART_FIFO_TXEMPT_Msk|nxp.LPUART_FIFO_RXEMPT_Msk| |
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nxp.LPUART_FIFO_TXOF_Msk|nxp.LPUART_FIFO_RXUF_Msk)) >> 16) |
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} |
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func (uart *UART) getEnabledInterrupts() uint32 { |
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return ((uart.Bus.BAUD.Get() & uint32(nxp.LPUART_BAUD_LBKDIE_Msk|nxp.LPUART_BAUD_RXEDGIE_Msk)) >> 8) | |
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((uart.Bus.FIFO.Get() & uint32(nxp.LPUART_FIFO_TXOFE_Msk|nxp.LPUART_FIFO_RXUFE_Msk)) >> 8) | |
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(uart.Bus.CTRL.Get() & uint32(0xFF0C000)) |
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} |
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func (uart *UART) disableInterrupts(mask uint32) { |
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uart.Bus.BAUD.ClearBits((mask << 8) & uint32(nxp.LPUART_BAUD_LBKDIE_Msk|nxp.LPUART_BAUD_RXEDGIE_Msk)) |
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uart.Bus.FIFO.Set((uart.Bus.FIFO.Get() & ^uint32(nxp.LPUART_FIFO_TXOF_Msk|nxp.LPUART_FIFO_RXUF_Msk)) & |
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^uint32((mask<<8)&(nxp.LPUART_FIFO_TXOFE_Msk|nxp.LPUART_FIFO_RXUFE_Msk))) |
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mask &= uint32(0xFFFFFF00) |
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uart.Bus.CTRL.ClearBits(mask) |
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} |
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func (uart *UART) handleInterrupt(interrupt.Interrupt) { |
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stat := uart.getStatus() |
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inte := uart.getEnabledInterrupts() |
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_, txSize := uart.getFIFOSize() |
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// check for and clear overrun, otherwise RX will not work
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if (stat & uint32(nxp.LPUART_STAT_OR)) != 0 { |
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uart.Bus.STAT.Set((uart.Bus.STAT.Get() & uint32(0x3FE00000)) | nxp.LPUART_STAT_OR) |
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} |
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// idle or receive data register is full
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if (stat & uint32(nxp.LPUART_STAT_RDRF|nxp.LPUART_STAT_IDLE)) != 0 { |
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count := (uart.Bus.WATER.Get() & uint32(nxp.LPUART_WATER_RXCOUNT_Msk)) >> nxp.LPUART_WATER_RXCOUNT_Pos |
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for ; count > 0; count-- { |
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// read up to 8 bits of data at a time
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// TODO: 7, 9, and 10-bit support?
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uart.Buffer.Put(uint8(uart.Bus.DATA.Get() & uint32(0xFF))) |
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} |
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// if it was an IDLE status, clear the flag
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if (stat & uint32(nxp.LPUART_STAT_IDLE)) != 0 { |
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uart.Bus.STAT.SetBits(nxp.LPUART_STAT_IDLE) |
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} |
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// disable idle line interrupts
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uart.disableInterrupts(nxp.LPUART_CTRL_RIE | nxp.LPUART_CTRL_ORIE) |
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} |
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// check if we have data to write
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if ((inte & nxp.LPUART_CTRL_TIE) != 0) && ((stat & nxp.LPUART_STAT_TDRE) != 0) { |
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for ((uart.Bus.WATER.Get() & uint32(nxp.LPUART_WATER_TXCOUNT_Msk)) >> nxp.LPUART_WATER_TXCOUNT_Pos) < txSize { |
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if b, ok := uart.txBuffer.Get(); ok { |
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uart.Bus.DATA.Set(uint32(b)) |
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} else { |
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break |
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} |
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} |
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if uart.Bus.STAT.HasBits(nxp.LPUART_STAT_TDRE) { |
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uart.Bus.CTRL.Set((uart.Bus.CTRL.Get() & ^uint32(nxp.LPUART_CTRL_TIE)) | nxp.LPUART_CTRL_TCIE) |
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} |
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} |
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if ((inte & nxp.LPUART_CTRL_TCIE) != 0) && ((stat & nxp.LPUART_STAT_TC) != 0) { |
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uart.stopTransmitting() |
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uart.Bus.CTRL.ClearBits(nxp.LPUART_CTRL_TCIE) |
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} |
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} |
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